Patents by Inventor Jean-Paul Garandet

Jean-Paul Garandet has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160230306
    Abstract: A method for manufacturing a silicon ingot having uniform phosphorus concentration. The method includes at least the steps of: (i) providing a quasi-uniform molten silicon bath containing at least phosphorus; and (ii) proceeding to the directional solidification of the silicon, wherein a speed (VI) for solidifying the silicon and a rate (JLV) of evaporation of the phosphorus at the liquid/vapor interface of the bath are controlled such that, at each moment of the directional solidification, the following equation is verified: VI=k?/(2?k) (E), wherein k? is the phosphorus transfer coefficient, and k is the distribution coefficient of the phosphorus in the silicon. Also relates to a silicon ingot having uniform phosphorus concentration across a height of at least 20 cm.
    Type: Application
    Filed: September 16, 2014
    Publication date: August 11, 2016
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Jean-Paul GARANDET, Malek BENMANSOUR, Anis JOUINI, David PELLETIER
  • Publication number: 20160222542
    Abstract: A substrate characterised in that it is at least partially surface-coated with a coating containing at least one so-called “barrier” layer having silica and one or more material(s) X selected from among SiC, Si, Si3N4, in which layer the amount of X varies between 25-wt. % and 50.-wt. % in relation to the total weight of the barrier layer, the barrier layer being formed by grains of one or more materials X covered at least partially in a silica shell, and the barrier layer being in direct contact with the substrate.
    Type: Application
    Filed: September 12, 2014
    Publication date: August 4, 2016
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Jean-Paul GARANDET, Denis CAMEL, Béatrice DREVET, Nicolas EUSTATHOPOULOS, Charles HUGUET, Johann TESTARD, Rayisa VOYTOVYCH
  • Publication number: 20160211404
    Abstract: A method for preparing silicon substrate having average crystallite size greater than or equal to 20 ?m, including at least the steps of: (i) providing polycrystalline silicon substrate of which average grain size is less than or equal to 10 ?m; (ii) subjecting substrate to overall homogeneous plastic deformation, at temperature of at least 1000° C.; (iii) subjecting substrate to localised plastic deformation in plurality of areas of substrate, called external stress areas, spacing between two consecutive areas being at least 20 ?m, local deformation of substrate being strictly greater than overall deformation carried out in step (ii); step (iii) being able to be carried out subsequent to or simultaneous to step (ii); and (iv) subjecting substrate obtained in step (iii) to recrystallisation heat treatment in solid phase, at temperature strictly greater than temperature used in step (ii), in order to obtain desired substrate.
    Type: Application
    Filed: September 24, 2014
    Publication date: July 21, 2016
    Applicant: COMMISSARIAT À L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Jean-Marie LEBRUN, Jean-Paul GARANDET, Jean-Michel MISSIAEN, Céline PASCAL
  • Publication number: 20160181457
    Abstract: A process for fabricating a wafer of thickness, including at least (i) providing a monolithic substrate made of p-doped silicon; (ii) forming crystal defects in predefined portions of at least one of the sides of the substrate; (iii) subjecting the subject to a thermal anneal; (iv) bringing all or some of one of the sides of the substrate into contact with hydrogen; (v) if necessary, promoting the diffusion of the hydrogen; and (vi) subjecting the substrate to a heat treatment.
    Type: Application
    Filed: December 22, 2015
    Publication date: June 23, 2016
    Applicant: COMMISSARIA À L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Sébastien Dubois, Nicolas Enjalbert, Jean-Paul Garandet, Benoît Martel, Jordi Veirman
  • Patent number: 9373504
    Abstract: The present invention relates to a method for manufacturing an epitactic silicon layer made up of crystallites with a size no lower than 20 ?m, including: providing a layer of crystallized silicon the surface of which, being inhomogeneous in terms of the size of the crystallites, is made up of large crystallites with a size no lower than 20 ?m, and small crystallites of a smaller size; forming, on the surface of the inhomogeneous silicon layer, a layer of at least one non-nucleating material for the silicon, the thickness of which is adjusted such to cover the entire outer surface of the small crystallites, while leaving all or part of the outer surface of the large crystallites accessible; and carrying out epitaxial growth of a silicon layer on the surface of the assembly obtained at the end of step, under conditions that are suitable for forming the expected epitactic layer.
    Type: Grant
    Filed: May 22, 2013
    Date of Patent: June 21, 2016
    Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Jean-Paul Garandet, Etienne Pihan
  • Patent number: 9230806
    Abstract: The present invention relates to a method for forming a crystallized silicon layer made up of grains having an average size of no less than 20 ?m, including at least the steps that comprise: (1) providing a layer of silicon to be (re)crystallized, the average grain size of which is less than 10 ?m; (2) placing said layer of silicon to be (re)crystallized in contact with a liquid composition at least partially made up of a metal solvent; and (3) exposing the assembly to a thermal treatment suitable for (re)crystallizing said layer of silicon with the expected grain size, characterized in that said thermal treatment includes heating the assembly made up of the layer of silicon in contact with said liquid composition to a temperature that is lower than 1410° C. and at least equal to the eutectic temperature in the solvent-silicon phase diagram.
    Type: Grant
    Filed: April 8, 2013
    Date of Patent: January 5, 2016
    Assignees: Commissariat a l'Energie Atomique et aux Energies Alternatives, S'Tile
    Inventors: Jean-Paul Garandet, Virginie Brize, Etienne Pihan, Alain Straboni, Florent Dupont
  • Publication number: 20150299897
    Abstract: The invention relates to a method for forming a crystallised silicon layer having a crystallite size higher than or equal to 100 ?m, by the epitaxial growth in a vapour phase, on the surface of at least one silicon substrate, including at least the steps: (i) providing a silicon substrate having a particle size higher than or equal to 100 ?m and including a metal impurities content of between 0 ppb and 1 ppm by weight; and (ii) forming the silicon layer on the surface of the substrate heated to a temperature of between 1000 and 1300° C., by decomposition of at least one silicon precursor by unit of an inductive plasma torch, the surface of the substrate for supporting the silicon layer being positioned close to the outlet of the plasma torch in step (ii).
    Type: Application
    Filed: September 23, 2013
    Publication date: October 22, 2015
    Inventors: Malek BENMANSOUR, Jean-Paul GARANDET, Daniel MORVAN
  • Patent number: 9145339
    Abstract: The present invention relates to novel materials intended for being contacted with liquid silicon and having a multilayer architecture, the intermediate layer of which is formed by a silicon carbide matrix containing at least one carbon nodule. The invention also relates to the method for preparing said materials.
    Type: Grant
    Filed: September 3, 2009
    Date of Patent: September 29, 2015
    Assignees: Commissariat a l'Energie Atomique et Energies Alternatives, Center National de la Recherche Scientifique
    Inventors: Jean-Paul Garandet, Denis Camel, Béatrice Drevet, Nicolas Eustathopoulos, Rana Israel
  • Publication number: 20150263216
    Abstract: The restoration device of least one silicon-based photovoltaic solar cell includes a support of the cell, a heat source configured to heat the photovoltaic solar cell, and unit for generating charge carriers in the cell. To better accelerate the restoration kinetics of the solar cell, the device includes an ultrasonic transducer designed to generate ultrasonic waves propagating in the photovoltaic solar cell.
    Type: Application
    Filed: September 16, 2013
    Publication date: September 17, 2015
    Inventors: Sébastien Dubois, Nicolas Enjalbert, Jean-Paul Garandet, Pierre Gidon, Florent Tanay, Jordi Veirman
  • Patent number: 9127373
    Abstract: The melting and solidification furnace for crystalline material includes a crucible having a bottom and side walls, and means for heating the crystalline material by magnetic induction. The furnace includes at least one lateral thermal insulation system arranged at the periphery of the crucible around the side walls. At least one lateral element of the lateral thermal insulation system moves with respect to the side walls between an insulating position and a position fostering thermal leakage. The lateral thermal insulation system has an electric conductivity of less than 1 S/m and a thermal conductivity of less than 15 W/m/K.
    Type: Grant
    Filed: December 4, 2009
    Date of Patent: September 8, 2015
    Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVE
    Inventors: David Pelletier, Jean-Paul Garandet
  • Publication number: 20150249173
    Abstract: The present invention relates to a method for manufacturing a monolithic silicon wafer (10) comprising multiple vertical junctions (2) having an alternation of n-doped areas and p-doped areas, including at least the steps of: (i) providing a liquid bath (100) including silicon, at least one n-type doping agent and at least one p-type doping agent; (ii) proceeding to directionally solidify the silicon in a direction (I), varying the convection-diffusion parameters thereof in order to alternate the growth of n-doped silicon layers (101) and p-doped silicon layers (102); and (iii) cutting a slice (104), parallel to the direction (I), of the multi-layer structure obtained at the end of the step (ii), such as to obtain said expected wafer (10).
    Type: Application
    Filed: September 3, 2013
    Publication date: September 3, 2015
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Jean-Paul Garandet, Nicolas Chaintreuil, Annalaura Fasiello, Eric Pilat, Yannick Veschetti
  • Publication number: 20150236190
    Abstract: A restoration device of at least one silicon-based photovoltaic solar cell is provided with a support of the cell and a charge carriers generator configured to generate charge carriers in the photovoltaic solar cell. The device is further provided with a tank designed to be filled by a liquid, and the support is configured to place the photovoltaic solar cell in the liquid.
    Type: Application
    Filed: September 16, 2013
    Publication date: August 20, 2015
    Inventors: Sébastien Dubois, Nicolas Enjalbert, Jean-Paul Garandet, Pierre Gidon, Florent Tanay, Jordi Veirman
  • Publication number: 20150155168
    Abstract: The present invention relates to a method for manufacturing an epitactic silicon layer made up of crystallites with a size no lower than 20 ?m, including: providing a layer of crystallised silicon the surface of which, being inhomogeneous in terms of the size of the crystallites, is made up of large crystallites with a size no lower than 20 ?m, and small crystallites of a smaller size; forming, on the surface of the inhomogeneous silicon layer, a layer of at least one non-nucleating material for the silicon, the thickness of which is adjusted such to cover the entire outer surface of the small crystallites, while leaving all or part of the outer surface of the large crystallites accessible; and carrying out epitaxial growth of a silicon layer on the surface of the assembly obtained at the end of step, under conditions that are suitable for forming the expected epitactic layer.
    Type: Application
    Filed: May 22, 2013
    Publication date: June 4, 2015
    Inventors: Jean-Paul Garandet, Etienne Pihan
  • Publication number: 20150079772
    Abstract: The present invention relates to a method for forming a crystallised silicon layer made up of grains having an average size of no less than 20 ?m, including at least the steps that comprise: (1) providing a layer of silicon to be (re)crystallised, the average grain size of which is less than 10 ?m; (2) placing said layer of silicon to be (re)crystallised in contact with a liquid composition at least partially made up of a metal solvent; and (3) exposing the assembly to a thermal treatment suitable for (re)crystallising said layer of silicon with the expected grain size, characterised in that said thermal treatment includes heating the assembly made up of the layer of silicon in contact with said liquid composition to a temperature that is lower than 1410° C. and at least equal to the eutectic temperature in the solvent-silicon phase diagram.
    Type: Application
    Filed: April 8, 2013
    Publication date: March 19, 2015
    Inventors: Jean-Paul Garandet, Virginie Brize, Etienne Pihan, Alain Straboni, Florent Dupont
  • Patent number: 8974216
    Abstract: A solution for texturing silicon wafers configured to constitute photovoltaic (PV) cells. Silicon wafers can be produced, the surface of which include uniformly engraved patterns having a depth of between 5 and 50 ?m.
    Type: Grant
    Filed: April 27, 2011
    Date of Patent: March 10, 2015
    Assignee: Commissariat a l' énergie atomique et aux énergies alternatives
    Inventors: Jean-Paul Garandet, Jacky Bancillon, Luc Federzoni, Marc Pirot
  • Patent number: 8963345
    Abstract: An encapsulation device including two casings made of a flexible polymer material, each delimiting a sealed space, and at least one hydrophobic material filling each of the casings, the casings being stacked and sealingly interconnected at peripheral edges thereof, a sealed space then being defined between the two casings for receiving a device to be encapsulated.
    Type: Grant
    Filed: December 9, 2010
    Date of Patent: February 24, 2015
    Assignee: Commissariat à l'énergie atomique et aux énergies alternatives
    Inventors: Stephane Cros, Nicole Alberola, Jean-Paul Garandet, Arnaud Morlier
  • Publication number: 20150047556
    Abstract: The present invention relates to a method for purifying silicon, comprising at least the following steps: c) providing a container (1) that comprises silicon (10) in molten state, the container (1) having a longitudinal axis (X) and the silicon (10) in molten state defining a free surface (11) on the side opposite the bottom (4) of the container (1); d) imposing on the silicon (10) in molten state conditions that are favourable for the solidification thereof, the mean temporal velocity for the duration of step b) of propagating the solidification front (13) of the silicon, measured along the longitudinal axis (X) of the container (1), being no lower than 5 ?m/s, preferably 10 ?m/s; said method being characterised in that at least one stirring system (30) imposes, during all or part of step b), a flow of silicon (10) in molten state with a Reynolds number comprised between 3 104 and 3 106, preferably between 105 and 106.
    Type: Application
    Filed: January 11, 2013
    Publication date: February 19, 2015
    Inventors: Jean-Paul Garandet, Mickael Albaric, Claire Audoin, Denis Chavrier, Etienne Pihan
  • Patent number: 8956481
    Abstract: The present invention relates to a method of assembling carbon parts using a braze based on silicon carbide. The invention also relates to the parts assembled using such a method.
    Type: Grant
    Filed: September 3, 2009
    Date of Patent: February 17, 2015
    Assignees: Commissariat a l'Energie Atomique et aux Energies Alternatives, Institut National Polytechnique de Grenoble
    Inventors: Jean-Paul Garandet, Denis Camel, Beatrice Drevet, Nicolas Eustathopoulos, Rana Israel
  • Publication number: 20140261156
    Abstract: The present invention concerns a method of forming, by liquid phase epitaxial growth, on the surface of a plurality of substrates, a layer of crystallised silicon having a grain size greater than or equal to 200 ?m, comprising at least the steps consisting of: (i) arranging a liquid bath formed from a liquid metal solvent phase in which liquid silicon is homogeneously dispersed; (ii) immersing, in the bath of step (i), said substrates (1), in such a way that each of the surfaces of the substrates (1) that need to be coated is in contact with the liquid bath, said surfaces being arranged parallel to one another, and perpendicularly to the interface (3) of the liquid bath (2) and the gas atmosphere (4) contiguous to said liquid bath or according to an inclination angle of at least 45° in relation to said interface (3); (iii) imposing, on the whole of step (ii), conditions conducive to the vaporisation of said liquid solvent phase and to the establishing of a natural convection movement of the liquid bath in the
    Type: Application
    Filed: October 2, 2012
    Publication date: September 18, 2014
    Inventors: Virginie Brize, Jean-Paul Garandet, Stephen Giraud, Etienne Pihan
  • Publication number: 20140234602
    Abstract: A multilayer structure including a substrate and a first stack of a layer of SiO2 and a layer of material of the SiOxNyHz type positioned between the substrate and the layer of SiO2, in which the layer of SiO2 and the layer of material of the SiOxNyHz type have thicknesses (eB, eA) such that the thickness of the layer of SiO2 is less than or equal to 60 nm, the thickness of the layer of material of the SiOxNyHz type (eB) is more than twice the thickness (eA) of the layer of SiO2, and the sum of the thicknesses of the layer of SiO2 and of the layer of material of the SiOxNyHz type is between 100 nm and 500 nm, and in which z is strictly less than the ratio (x+y)/5, and advantageously z is strictly less than the ratio (x+y)/10.
    Type: Application
    Filed: September 24, 2012
    Publication date: August 21, 2014
    Applicant: Commissariat a l'energie atomique et aux ene alt
    Inventors: Stephane Cros, Nicole Alberola, Jean-Paul Garandet, Arnaud Morlier