Patents by Inventor Jean Tourrilhes

Jean Tourrilhes has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210273869
    Abstract: Techniques and architectures for measuring available bandwidth. A train of probe packets is received from a remote electronic device. A per-packet one-way delay (OWD) is calculated for at least two packets from the train of probe packets. An OWD threshold value is calculated based on the calculated OWD for the at least two packets from the train of probe packets. A packet pair is selected from the train of probe packets based on the per-packet OWD for each packet in the packet pair exceeding the OWD threshold value. An estimated available bandwidth is computed based on one or more transmission characteristics of the selected packet pair.
    Type: Application
    Filed: February 29, 2020
    Publication date: September 2, 2021
    Inventors: JEAN TOURRILHES, Puneet Sharma
  • Publication number: 20210243133
    Abstract: Techniques and architectures for measuring available bandwidth. A train of probe packets is received from a remote electronic device. A network transmission delay for at least two packets from the train of probe packets is measured. Network congestion is estimated utilizing the at least two packets from the train of probe packets. An estimated available bandwidth is computed based on the network transmission and estimated network congestion. One or more network transmission characteristics are modified based on the estimated available bandwidth.
    Type: Application
    Filed: January 31, 2020
    Publication date: August 5, 2021
    Inventors: Jean Tourrilhes, Puneet Sharma
  • Patent number: 11038834
    Abstract: An example system may comprise a set of network devices in a network topology, the network topology having a plurality of external links that connect to other networks, wherein the system comprises a processing resource to: assign multiple Internet Protocol (IP) addresses to one of the network interfaces of a client device; communicate the multiple IP addresses to a network interface of the client device; receive a packet from the one of the network interfaces, wherein the packet includes a source address that is one of the multiple IP addresses; select an external link of the plurality of external links based on the source address of the packet; and forward the packet via the external link of the plurality of external links.
    Type: Grant
    Filed: January 31, 2018
    Date of Patent: June 15, 2021
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Jean Tourrilhes, Puneet Sharma, Yang Zhang
  • Patent number: 10965788
    Abstract: Various aspects of the subject technology relate to methods, systems, and machine-readable media for multi-path transmission control protocol (MP-TCP) proxy tunneling. The method includes reading a first multi-path transmission control protocol (MP-TCP) information from at least one first MP-TCP header, the at least one first MP-TCP header included in a first MP-TCP subflow, the first MP-TCP subflow included in a first MP-TCP session. The method also includes encapsulating the first MP-TCP information in a second MP-TCP session, the second MP-TCP session different from the first MP-TCP session. The method also includes sending the first MP-TCP information through the second MP-TCP session.
    Type: Grant
    Filed: March 18, 2019
    Date of Patent: March 30, 2021
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Jean Tourrilhes, Puneet Sharma
  • Patent number: 10873520
    Abstract: The present disclosure provides a method, apparatus, and system for identifying packet batching within computer networks. A method consistent with the present disclosure includes sending a probe train of packets to traverse a network path within a computer network. Next, identifying a contiguous set of packets that traversed the network path with a negative DIAD time. Further, classifying the contiguous set of packets as a packet batch when a packet that traversed the network path right before the contiguous set of packets traversed the network path has a positive DIAD time. In addition, a size of a next probe train of packets that are to be sent to traverse the network path can be adjusted based on the size of the contiguous set of packets. Accurately identifying packet batching can enable more precise computer network bandwidth estimation and network traffic engineering solutions.
    Type: Grant
    Filed: July 2, 2018
    Date of Patent: December 22, 2020
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Jean Tourrilhes, Puneet Sharma
  • Patent number: 10868757
    Abstract: Example embodiments relate to providing efficient routing in software defined networks. In example embodiments, an indirect group table includes a first group entry that is associated with a first route tree in a software defined network, wherein the indirect group table affects a plurality of forwarding table entries associated with the first group entry. A failure is detected in the first route tree during a data transmission, and a notification of the failure is sent to a remote controller device, where the remote controller device identifies a second route tree that does not include the failure. After the remote controller device updates the first group entry to be associated with the second route tree, the data transmission is performed using the second route tree.
    Type: Grant
    Filed: November 26, 2018
    Date of Patent: December 15, 2020
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Jose Renato G. Santos, Yoshio Turner, Mike Schlansker, Jean Tourrilhes
  • Publication number: 20200304606
    Abstract: Various aspects of the subject technology relate to methods, systems, and machine-readable media for multi-path transmission control protocol (MP-TCP) proxy tunneling. The method includes reading a first multi-path transmission control protocol (MP-TCP) information from at least one first MP-TCP header, the at least one first MP-TCP header included in a first MP-TCP subflow, the first MP-TCP subflow included in a first MP-TCP session. The method also includes encapsulating the first MP-TCP information in a second MP-TCP session, the second MP-TCP session different from the first MP-TCP session. The method also includes sending the first MP-TCP information through the second MP-TCP session.
    Type: Application
    Filed: March 18, 2019
    Publication date: September 24, 2020
    Inventors: Jean Tourrilhes, Puneet Sharma
  • Patent number: 10659569
    Abstract: The disclosed systems and methods provide end-to-end multipath TCP (MPTCP) through a network gateway. The method includes detecting a MPTCP subflow having a first IP address as a source address and a second IP address as a destination address, wherein none of the gateways is the source or the destination of the MPTCP subflow; associating a third IP address with the MPTCP subflow; and advertising, to at least one endpoint of the MPTCP subflow, the third IP address.
    Type: Grant
    Filed: January 18, 2019
    Date of Patent: May 19, 2020
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Jean Tourrilhes, Puneet Sharma
  • Patent number: 10565004
    Abstract: In an example, memory register interrupt based signaling and messaging may include receiving, at a control register of a receiver, a signal number from a sender, and copying, by a memory register interrupt management device of the receiver, the signal number to an associated status register of the receiver. Further, memory register interrupt based signaling and messaging may include generating, independently of the signal number from the status register, an interrupt to a central processing unit of the receiver, and triggering, based on the interrupt, an interrupt handler of the receiver to perform an action associated with the signal number.
    Type: Grant
    Filed: February 4, 2016
    Date of Patent: February 18, 2020
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Jean Tourrilhes, Mike Schlansker
  • Publication number: 20200007426
    Abstract: The present disclosure provides a method, apparatus, and system for identifying packet batching within computer networks. A method consistent with the present disclosure includes sending a probe train of packets to traverse a network path within a computer network. Next, identifying a contiguous set of packets that traversed the network path with a negative DIAD time. Further, classifying the contiguous set of packets as a packet batch when a packet that traversed the network path right before the contiguous set of packets traversed the network path has a positive DIAD time. In addition, a size of a next probe train of packets that are to be sent to traverse the network path can be adjusted based on the size of the contiguous set of packets. Accurately identifying packet batching can enable more precise computer network bandwidth estimation and network traffic engineering solutions.
    Type: Application
    Filed: July 2, 2018
    Publication date: January 2, 2020
    Inventors: Jean Tourrilhes, Puneet Sharma
  • Patent number: 10492211
    Abstract: The present disclosure is generally related to a method for wireless software-defined networking. The method includes establishing a wireless link between an access point of a network and a plurality of client devices. The method includes generating a time schedule. The time schedule allocates a time window to each of the plurality of client devices. Each time window defines when a plurality of client devices is allowed to communicate within the network via the access point.
    Type: Grant
    Filed: October 31, 2013
    Date of Patent: November 26, 2019
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Jung Gun Lee, Mostafa Abdulla Zahid Uddin, Jean Tourrilhes, Souvik Sen, Manfred R. Arndt
  • Patent number: 10423530
    Abstract: Examples disclosed herein relate to partial cache coherence. In some examples disclosed herein, a node connected to a memory fabric may include local cache connected to a local processor and a memory coherency proxy to. The memory coherency proxy may configure a portion of a fabric memory on the memory fabric as a proxy backing memory and expose the proxy backing memory to other nodes in the memory fabric as a fictitious local memory on the node, and may implement partial coherency for memory requests directed to the fictitious local memory. The fictitious local memory may have a memory address region different from a memory address region of a native local memory on the node.
    Type: Grant
    Filed: May 8, 2017
    Date of Patent: September 24, 2019
    Assignee: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
    Inventors: Jean Tourrilhes, Michael Schlansker
  • Publication number: 20190238497
    Abstract: An example system may comprise a set of network devices in a network topology, the network topology having a plurality of external links that connect to other networks, wherein the system comprises a processing resource to: assign multiple Internet Protocol (IP) addresses to one of the network interfaces of a client device; communicate the multiple IP addresses to a network interface of the client device; receive a packet from the one of the network interfaces, wherein the packet includes a source address that is one of the multiple IP addresses; select an external link of the plurality of external links based on the source address of the packet; and forward the packet via the external link of the plurality of external links.
    Type: Application
    Filed: January 31, 2018
    Publication date: August 1, 2019
    Inventors: Jean Tourrilhes, Puneet Sharma, Yang Zhang
  • Publication number: 20190097919
    Abstract: Example embodiments relate to providing efficient routing in software defined networks. In example embodiments, an indirect group table includes a first group entry that is associated with a first route tree in a software defined network, wherein the indirect group table affects a plurality of forwarding table entries associated with the first group entry. A failure is detected in the first route tree during a data transmission, and a notification of the failure is sent to a remote controller device, where the remote controller device identifies a second route tree that does not include the failure. After the remote controller device updates the first group entry to be associated with the second route tree, the data transmission is performed using the second route tree.
    Type: Application
    Filed: November 26, 2018
    Publication date: March 28, 2019
    Inventors: JOSE RENATO G. SANTOS, Yoshio Turner, Mike Schlansker, Jean Tourrilhes
  • Publication number: 20190050253
    Abstract: In an example, memory register interrupt based signaling and messaging may include receiving, at a control register of a receiver, a signal number from a sender, and copying, by a memory register interrupt management device of the receiver, the signal number to an associated status register of the receiver. Further, memory register interrupt based signaling and messaging may include generating, independently of the signal number from the status register, an interrupt to a central processing unit of the receiver, and triggering, based on the interrupt, an interrupt handler of the receiver to perform an action associated with the signal number.
    Type: Application
    Filed: February 4, 2016
    Publication date: February 14, 2019
    Inventors: Jean Tourrilhes, Mike Schlansker
  • Publication number: 20190026233
    Abstract: Some examples described herein provide for a partially coherent memory transfer. An example method includes moving data directly from a coherence domain of an originating symmetric multiprocessor (SMP) node across a memory fabric to a target location for the data within a coherence domain of a receiving SMP node.
    Type: Application
    Filed: January 12, 2016
    Publication date: January 24, 2019
    Inventors: Mike Schlansker, Jean Tourrilhes
  • Patent number: 10146689
    Abstract: Examples disclosed herein relate to locally polling the value of a flag to determine whether a resource is free for a thread to use in a system with multiple processing nodes that are incoherent with regards to each other. A flag in a direct attached memory to one of the processing nodes is set to indicate that the resource is not free for the thread to use. A previous tail of a lock list is determined from a list master. The previous tail is located on another one of the processing nodes.
    Type: Grant
    Filed: January 20, 2017
    Date of Patent: December 4, 2018
    Assignee: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
    Inventors: Michael Schlansker, Jean Tourrilhes, Charles B. Morrey, III
  • Patent number: 10142220
    Abstract: Example embodiments relate to providing efficient routing in software defined networks. In example embodiments, an indirect group table includes a first group entry that is associated with a first route tree in a software defined network. A failure is detected in the first route tree during a data transmission, and a notification of the failure is sent to a remote controller device, where the remote controller device identifies a second route tree that does not include the failure. After the remote controller device updates the first group entry to be associated with the second route tree, the data transmission is performed using the second route tree.
    Type: Grant
    Filed: April 29, 2014
    Date of Patent: November 27, 2018
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Jose Renato G. Santos, Yoshio Turner, Mike Schlansker, Jean Tourrilhes
  • Publication number: 20180322058
    Abstract: Examples disclosed herein relate to partial cache coherence. In some examples disclosed herein, a node connected to a memory fabric may include local cache connected to a local processor and a memory coherency proxy to. The memory coherency proxy may configure a portion of a fabric memory on the memory fabric as a proxy backing memory and expose the proxy backing memory to other nodes in the memory fabric as a fictitious local memory on the node, and may implement partial coherency for memory requests directed to the fictitious local memory. The fictitious local memory may have a memory address region different from a memory address region of a native local memory on the node.
    Type: Application
    Filed: May 8, 2017
    Publication date: November 8, 2018
    Inventors: Jean Tourrilhes, Michael Schlansker
  • Patent number: 10048440
    Abstract: A photonic interconnect apparatus includes tunable light devices, multiplexers to multiplex optical signals produced by the tunable light devices onto optical paths, and a cyclic arrayed waveguide grating (AWG) to receive the optical signals over the optical paths, and to direct a given optical signal of the received optical signals to a selected output of a plurality of outputs of the cyclic AWG based on a wavelength of the given optical signal. A respective demultiplexer directs the given optical signal to a selected output of a plurality of outputs of the respective demultiplexer according to which coarse wavelength band the wavelength of the given optical signal is part of.
    Type: Grant
    Filed: January 29, 2015
    Date of Patent: August 14, 2018
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Mike Schlansker, Jean Tourrilhes, Michael Renne Ty Tan, Joaquin Matres, Wayne Victor Sorin