Patents by Inventor Jeff G. Hargis

Jeff G. Hargis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7171534
    Abstract: A memory controller system for processing memory access requests comprising a first memory controller operable to address a first plurality of memory modules a second memory controller operable to address a second plurality of memory modules, the first and second memory controllers configurable to process a memory transaction in an operational mode of the memory controller system selected from the group consisting of an independent cell mode, a multiplexer-mode (mux-mode), and a lockstep mode, and a bus interface block operable to convey the memory transaction to both of the first and second memory controllers is provided.
    Type: Grant
    Filed: December 17, 2004
    Date of Patent: January 30, 2007
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Jeff G. Hargis, George Thomas Letey, Michael Kennard Tayler
  • Patent number: 6854043
    Abstract: A memory controller system for processing memory access requests comprising a first memory controller operable to address a first plurality of memory modules a second memory controller operable to address a second plurality of memory modules, the first and second memory controllers configurable to process a memory transaction in an operational mode of the memory controller system selected from the group consisting of an independent cell mode, a multiplexer-mode (mux-mode), and a lockstep mode, and a bus interface block operable to convey the memory transaction to both of the first and second memory controllers is provided.
    Type: Grant
    Filed: July 5, 2002
    Date of Patent: February 8, 2005
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Jeff G. Hargis, George Thomas Letey, Michael Kennard Tayler
  • Publication number: 20040006674
    Abstract: A memory controller system for processing memory access requests comprising a first memory controller operable to address a first plurality of memory modules a second memory controller operable to address a second plurality of memory modules, the first and second memory controllers configurable to process a memory transaction in an operational mode of the memory controller system selected from the group consisting of an independent cell mode, a multiplexer-mode (mux-mode), and a lockstep mode, and a bus interface block operable to convey the memory transaction to both of the first and second memory controllers is provided.
    Type: Application
    Filed: July 5, 2002
    Publication date: January 8, 2004
    Inventors: Jeff G. Hargis, George Thomas Letey, Michael Kennard Tayler