Abstract: A user control device operates with a variety of host systems, including computers, televisions and recorded or streaming video playback devices, and gaming systems, is mounted to the user's hand. The user control device includes audio and optical sensors for capturing audio and image or video data, allowing the use of voice commands and display focal center alignment control for “swiping” or scrolling the display. A combined inertial (accelerometer(s), gyroscope(s) and a magnetometer) sensor detects translation and rotation movement of the user control device for pointing and selecting within real or virtual three-dimensional space. Haptic (e.g., vibration) feedback units provide tactile feedback to the user to confirm double clicks and similar events.

Abstract: Circuitry for encrypting at least a part of an input data flow and generating a tag based on the input data flow with the same ciphering algorithm and the same key, the algorithm including iterative computations by at least two operation units, the circuitry including a pipeline including an input selection unit arranged to receive first data values to generate encryption sequences with the ciphering algorithm, second data values to generate temporary tags with the ciphering algorithm and an output of the pipeline; a first stage arranged to receive an output of the input selection unit and including at least a first operation unit; and a second stage arranged to receive an output of the first stage, including at least a second operation unit and providing the output of the pipeline.

Abstract: Circuitry for encrypting at least a part of an input data flow and generating a tag based on the input data flow with the same ciphering algorithm and the same key including a first ciphering branch arranged to encrypt the at least part of the input data; a second ciphering branch arranged to generate the tag; and a single key schedule unit arranged to receive the key, to generate at least one sub-key based on the key and to provide the at least one sub-key to the first and second ciphering branches.

Abstract: Circuitry for encrypting at least a part of an input data flow and generating a tag based on the input data flow with the same ciphering algorithm and the same key including a first ciphering branch arranged to encrypt the at least part of the input data; a second ciphering branch arranged to generate the tag; and a single key schedule unit arranged to receive the key, to generate at least one sub-key based on the key and to provide the at least one sub-key to the first and second ciphering branches.

Abstract: Circuitry for encrypting at least a part of an input data flow and generating a tag based on the input data flow with the same ciphering algorithm and the same key, the algorithm including iterative computations by at least two operation units, the circuitry including a pipeline including an input selection unit arranged to receive first data values to generate encryption sequences with the ciphering algorithm, second data values to generate temporary tags with the ciphering algorithm and an output of the pipeline; a first stage arranged to receive an output of the input selection unit and including at least a first operation unit; and a second stage arranged to receive an output of the first stage, including at least a second operation unit and providing the output of the pipeline.

Abstract: A method of a storing a picture in a memory such that bandwidth can be reduced when retrieving an array portion of the picture from the memory, and a memory architecture are disclosed. The memory is subdivided into a plurality of words for storing a picture having rows and columns. The picture is partitioned into two or more stripes each having a predetermined number of columns. The number of bytes in one row of one stripe is equal to the number of bytes in one word, for storing the data in one row of a stripe in one word. For the case of progressive video sequences or images the memory is organized in frame structure. For the case of interlaced video sequences or images, the memory is organized in field structure. For a frame picture to be stored in a frame organized memory or a field picture to be stored in a field organized memory, the data in the first row of one of the stripes is stored in a first word.

Abstract: A DVD player that integrates a DVD device into a personal computer is provided. As such, the personal computer is able to output audio-visual works from a DVD CD-ROM. When integrating a DVD device with a personal computer, various problems must be overcome. For example, in a personal computer, the video display is controlled by a graphics controller, and in order to render an audio-visual stream in a personal computer, the audio-visual stream and the graphics controller must be synchronized. The synchronization problem arises because the graphics controller only displays data at the beginning of 33.4 millisecond time intervals. Thus, although the audio portion may be played almost immediately, the video portion may have to wait for up to 33.4 milliseconds before being displayed. In this manner, the audio portion and the video portion become unsynchronized which means that the audio portion plays before the corresponding video portion is displayed.

Abstract: A DVD CD-ROM player integrated with a personal computer is provided. When integrating a DVD CD-ROM with a personal computer, there are various problems that must be overcome. For example, the stream from the DVD CD-ROM utilizes a 27 MHz clock. However, a personal computer typically does not have a 27 MHz clock, but instead has a system clock, that runs at the frequency of the processor. Therefore, in order to play a DVD-based audio-visual work in a personal computer, a clock running at 27 MHz is needed. As such, a software clock running at 27 MHz is provided which facilitates the integration of a DVD CD-ROM into a personal computer. By using a software clock, synchronization of the audio-visual stream is facilitated and both cost and development time are reduced.

Abstract: The present invention provides a system whereby the microprocessor and the bus controller in a personal computer can be driven at different frequencies. Furthermore with the present invention the COMMAND DELAY and the WAIT STATE signals on the bus can be adjusted under program control.