Abstract: In one embodiment, saturation of the control system of a power amplifier is limited by comparing a control voltage at a first control node against a scaled battery voltage, and then drawing an error current away from the first control node when the control voltage exceeds the scaled battery voltage. The first control node may be located after a trans-conductance amplifier in a feedback control system.

Abstract: A resistor network bias circuit (24) and method is suitable for use in monolithic circuits. The method involves selecting resistors set a quiescent current for a two-stage power amplifier. The bias circuit (24) offsets the gate voltage for a first transistor (14) and a second N-channel depletion mode MESFET transistor (22) to maintain substantially constant drain current for the power amplifier over a range of threshold voltages. Selectable metal links (33-83) serially connected to resistors (30-80) provide parallel resistor combinations (36-86) for setting the quiescent currents of transistors (14 and 22).

Abstract: A current mirror circuit that can be disabled has been provided. An enable signal is applied to the base of a transistor that drives the common bases of an emitter-coupled pair of transistors. A voltage level of the enable signal may be used to turn off the transistor which subsequently turns off and disables the emitter-coupled pair of transistors.