Patents by Inventor Jeffrey A. Miks
Jeffrey A. Miks has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8018072Abstract: A semiconductor device has a substrate. A die is attached to a first surface of the substrate. A heat sink is provided having an approximately planer member and support members extending from the planer member. The support members are attached to the first surface of the substrate to form a cavity over the die with the planer member positioned above the die. An encapsulant is provided for encapsulating the device, wherein an exterior surface of the planer member is exposed. A non-tapered opening is formed in the planer member. The encapsulant is injected through the opening to encapsulate the cavity and the encapsulant will partially fill the non-tapered opening.Type: GrantFiled: December 23, 2008Date of Patent: September 13, 2011Assignee: Amkor Technology, Inc.Inventors: Jeffrey A. Miks, Jui Min Lim
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Patent number: 7960827Abstract: A thermal via heat spreader package includes an electronic component having an active surface including a nonfunctional region. A package body encloses the electronic component, the package body comprising a principal surface. Thermal vias extend from the principal surface through at least a portion of the package body and towards the nonfunctional region. A heat spreader is thermally connected to the thermal vias. Heat generated by the electronic component is dissipated to the thermal vias and to the heat spreader. The density of the thermal vias is increased in a hotspot of the electronic component thus maximizing heat transfer from the hotspot. In this manner, optimal heat transfer from the electronic component is achieved.Type: GrantFiled: April 9, 2009Date of Patent: June 14, 2011Assignee: Amkor Technology, Inc.Inventors: August J. Miller, Jr., Jeffrey A. Miks, Christopher M. Scanlan, Mahmoud Dreiza
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Patent number: 7485952Abstract: A memory card comprising a leadframe having a plurality of contacts, at least one die pad, and a plurality of conductive traces extending from respective ones of the contacts toward the die pad. Also included in the leadframe are at least two bumpers. Attached to the die pad is a semiconductor die which is electrically connected to at least one of the traces. A body defining at least two corner regions at least partially encapsulates the leadframe and the semiconductor die such that the contacts are exposed in a bottom surface defined by the body, and the bumpers are located at respective ones of the corner regions thereof.Type: GrantFiled: June 26, 2003Date of Patent: February 3, 2009Assignee: Amkor Technology, Inc.Inventors: Jeffrey A. Miks, Jung Chun Shis
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Patent number: 7358600Abstract: A circuit module for use in a memory card. The circuit module comprises a base substrate including a plurality of contacts. Attached to the base substrate is a memory die, while attached to the memory die is an interposer having a plurality of terminals electrically connected to each other in a prescribed pattern. At least one of the terminals is electrically connected to at least one of the contacts. Attached to the interposer is a controller die, with the memory die and the controller die each being electrically connected to at least one of the terminals of the interposer.Type: GrantFiled: November 16, 2004Date of Patent: April 15, 2008Assignee: Amkor Technology, Inc.Inventors: Maximilien d'Estries, Stephen G. Shermer, Jeffrey A. Miks
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Patent number: 7074654Abstract: A method of fabricating a memory card. The method comprises the initial step of providing a leadframe which has a dambar and a plurality of contacts, each of the contacts being attached to the dambar by at least one tie bar. A layer of tape is applied to the leadframe such that the tape covers at least portions of the top contact surfaces of the contacts, at least portions of the top tie bar surfaces of the tie bars, and at least a portion of the top dambar surface of the dambar. Thereafter, the tie bars are removed from the leadframe. At least one semiconductor die is then electrically connected to the leadframe, with a body thereafter being formed on the leadframe such that the semiconductor die and the tape are covered by the body and the bottom contact surfaces are exposed in an exterior surface thereof.Type: GrantFiled: April 21, 2004Date of Patent: July 11, 2006Assignee: Amkor Technology, Inc.Inventors: Jeffrey A. Miks, Curtis M. Zwenger, Maximilien d'Estries, Stephen G. Shermer
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Publication number: 20050030723Abstract: A fully-molded or lidded circuit module assembly having edge-stiffening interlock features provides packaging for memory modules and other circuit modules, while preventing de-lamination of the housing from the circuit supporting structure. The interlock features are provided around the periphery of the circuit supporting structure, which is generally a laminated circuit substrate, and mating features are provided on a lid that interlock with the interlock features or are generated by molding an encapsulation around the circuit supported structure in a fully-molded assembly. The interlocked assembly has added strength in bending, twisting or dropping, preventing internal de-lamination or lid detachment from causing circuit module failure.Type: ApplicationFiled: February 19, 2003Publication date: February 10, 2005Inventors: Jeffrey Miks, John Miranda, Curtis Zwenger
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Patent number: 6201186Abstract: An electronic component assembly (10) is formed by mounting an electronic component (15) to the leads (12) of a leadframe (18). The portions of the leadframe (18) that come in physical contact with the electronic component (15) are electrically connected to the electronic component with bonding wires (31) or by placing the bonding regions (30) of the electronic component (15) in direct physical contact with the tips (35) of the leads (12). A package (20) is used to encapsulate the leads (12) and the electronic component (15).Type: GrantFiled: June 29, 1998Date of Patent: March 13, 2001Assignee: Motorola, Inc.Inventors: Dwight L. Daniels, Jeffrey A. Miks, Dilip Patel
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Patent number: 6139079Abstract: A transport head (10) and a method for transporting flux and solder balls (50) to locations for bonding pads (46) on a workpiece (44). To transfer flux, a first pattern definition mask (12) is attached to the transport head (10) and allows selector pins (64) to fully extend and receive flux for transport to the bonding pads (46) on the substrate (44). To transfer the solder balls (50), pattern definition mask (12) attached to the transport head (10) defines locations that are to be populated with the solder balls (50). The transport head (10) transfers the solder balls (50) to the bonding pads (46) of the substrate (44).Type: GrantFiled: October 20, 1997Date of Patent: October 31, 2000Assignee: Motorola, Inc.Inventors: Dilip Patel, Jeffrey A. Miks, Dwight L. Daniels
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Patent number: 6103548Abstract: A semiconductor device includes a substrate (10) that can be cut into different sizes. A plurality of wirebond fingers (12) are formed on a top surface (13) of the substrate (10). The plurality of wirebond fingers (12) are located within concentric interconnect regions (23, 25, 27, 29, 31, 33, 35) and electrically connected to a via (14) by a signal interconnect line (11). The size of substrate (10) can be altered by cutting the substrate (10) to remove any of the interconnect regions (23, 25, 27, 29, 31, 33, 35). A semiconductor component (44) attached to the top side (13) of the substrate (10) can have a die pad (48) wirebonded to any of the plurality of wirebond fingers (12) located along the signal interconnect line (11) for connection to the via (14).Type: GrantFiled: September 17, 1997Date of Patent: August 15, 2000Assignee: Motorola, Inc.Inventors: Jeffrey A. Miks, Dilip Patel, Dwight L. Daniels, Stephen C. St. Germain
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Patent number: 5903051Abstract: An electronic component can be more easily tested after being mounted onto a circuit board (660). The component also stops cracks from propagating over vital areas of a substrate (110). The component includes an electrically insulative substrate (100), electrically conductive traces (120) supported by the electrically insulative substrate (100), and an electrically insulative layer (310) covering inner and outer portions of the electrically conductive traces (120) while middle portions of the electrically conductive traces (120) remain exposed.Type: GrantFiled: April 3, 1998Date of Patent: May 11, 1999Assignee: Motorola, Inc.Inventors: Jeffrey A. Miks, Dilip D. Patel, Dwight L. Daniels