Abstract: In one example in accordance with the present disclosure, a system is described. The system includes a sensor to detect an environmental condition for a computing device in which the system is disposed. A device sensor determines a temperature within the computing device. The system also includes a controller to selectively control a fan within the computing device based on the environmental condition and the temperature.

Abstract: An example of an apparatus is provided. The apparatus includes a power supply to connect to a power source. The power supply is to receive and to distribute a total power from the power source. The apparatus further includes a first device to receive a first portion of the total power from the power supply. The apparatus further includes a second device to receive a second portion of the total power from the power supply. A sum of the first portion and the second portion is the total power. In addition, the apparatus includes a controller to control the second device, wherein the controller is to determine the total power demanded by the first device and the second device. The controller is to reduce the second portion of the total power and to restore the second portion of the total power.

Abstract: A computing device is disclosed. The computing device includes a processing device having a rating of a first power amount. The computing device includes a processing infrastructure coupled to the processing device. The processing infrastructure is configured for a second power amount in which the second power amount is greater than the first power amount. The processing device is configurable to operate at the first power amount and the second power amount.

Abstract: In one example in accordance with the present disclosure, a system is described. The system includes a sensor to detect an environmental condition for a computing device in which the system is disposed. A device sensor determines a temperature within the computing device. The system also includes a controller to selectively control a fan within the computing device based on the environmental condition and the temperature.

Abstract: An example of an apparatus is provided. The apparatus includes a power supply to connect to a power source. The power supply is to receive and to distribute a total power from the power source. The apparatus further includes a first device to receive a first portion of the total power from the power supply. The apparatus further includes a second device to receive a second portion of the total power from the power supply. A sum of the first portion and the second portion is the total power. In addition, the apparatus includes a controller to control the second device, wherein the controller is to determine the total power demanded by the first device and the second device. The controller is to reduce the second portion of the total power and to restore the second portion of the total power.

Abstract: In an example implementation according to aspects of the present disclosure, a method may include receiving, at a device, timing information of a scheduled meeting, and determining time remaining for the scheduled meeting. The method further includes outputting, at the device, an indication of the time remaining at scheduled intervals.

Abstract: Examples disclosed herein provide an electronic device. One example electronic device includes a housing, a display panel stored in the housing, a base connector to interface with a base that provides structure support for the housing, and a controller connected to the base connector. The controller is to determine a type of the base via the base connector and set an input source of the controller based on the type.

Abstract: An example display device includes an input module to receive a touch input that identifies a shape of an electronic device. The display device also includes a display panel. The display panel is to display first data from a computing device in a first region of the display panel. The display panel is also to, in response to a reception of the touch input, display the first data in a second region of the display panel and display second data from the electronic device in a virtual representation of the electronic device in a third region of the display panel. The third region corresponds to the shape of the electronic device. The second data is received via a connection to the computing device. The second region is smaller than the first region.

Abstract: A computing system is associated with power consumption based on Power over Ethernet (PoE). Power consumption is compared to a threshold, and a signal is asserted that power consumption is to be limited based on the comparison to the threshold.

Abstract: An example display device includes an input module to receive a touch input that identifies a shape of an electronic device. The display device also includes a display panel. The display panel is to display first data from a computing device in a first region of the display panel. The display panel is also to, in response to a reception of the touch input, display the first data in a second region of the display panel and display second data from the electronic device in a virtual representation of the electronic device in a third region of the display panel. The third region corresponds to the shape of the electronic device. The second data is received via a connection to the computing device. The second region is smaller than the first region.

Abstract: A computing system is associated with power consumption based on Power over Ethernet (PoE). Power consumption is compared to a threshold, and a signal is asserted that power consumption is to be limited based on the comparison to the threshold.

Abstract: A computing system is associated with power consumption based on Power over Ethernet (PoE). Power consumption is compared to a threshold, and a signal is asserted that power consumption is to be limited based on the comparison to the threshold.

Abstract: A computing system is associated with power consumption based on Power over Ethernet (PoE). Power consumption is compared to a threshold, and a signal is asserted that power consumption is to be limited based on the comparison to the threshold.

Abstract: A fan speed controller for a computer system that calculates an internal central processing unit temperature and, in response to target fan speeds communicated over a system management bus, slowly adjusts the computer system fan speed such that audible noise associated with the fan speed change is not as perceptible as would be an immediate change in fan speed.

Abstract: A computer interface extension configuration that includes a host having a motherboard, an extension transmitter card, and an extension receiver. The motherboard includes a first connector that allows motherboard signals to be shared internal to the host, and a second connector separate from the first connector that supports communications with the host. The extension transmitter card is positioned within the host and is electrically connected to the motherboard of the host via at least the first connector and the second connector. The extension transmitter card has a graphics controller that interfaces with the second connector independent from communications that occur on the first connector. The extension receiver is connected to a plurality of user interface devices and extensibly connected to the extension transmitter card.

Abstract: A computer system includes an adaptive memory arbiter for prioritizing memory access requests, including a self-adjusting, programmable request-priority ranking system. The memory arbiter adapts during every arbitration cycle, reducing the priority of any request which wins memory arbitration. Thus, a memory request initially holding a low priority ranking may gradually advance in priority until that request wins memory arbitration. Such a scheme prevents lower-priority devices from becoming “memory-starved.” Because some types of memory requests (such as refresh requests and memory reads) inherently require faster memory access than other requests (such as memory writes), the adaptive memory arbiter additionally integrates a nonadjustable priority structure into the adaptive ranking system which guarantees faster service to the most urgent requests.

Abstract: A computer interface extension configuration that includes a host having a motherboard, an extension transmitter card, and an extension receiver. The motherboard includes a first connector that allows motherboard signals to be shared internal to the host, and a second connector separate from the first connector that supports communications with the host. The extension transmitter card is positioned within the host and is electrically connected to the motherboard of the host via at least the first connector and the second connector. The extension transmitter card has an audio controller that interfaces with the second connector independent from communications that occur on the first connector. The extension receiver is connected to a plurality of user interface devices and is extensibly connected to the extension transmitter card.

Abstract: A computer system includes an adaptive memory arbiter for prioritizing memory access requests, including a self-adjusting, programmable request-priority ranking system. The memory arbiter adapts during every arbitration cycle, reducing the priority of any request which wins memory arbitration. Thus, a memory request initially holding a low priority ranking may gradually advance in priority until that request wins memory arbitration. Such a scheme prevents lower-priority devices from becoming “memory-starved.” Because some types of memory requests (such as refresh requests and memory reads) inherently require faster memory access than other requests (such as memory writes), the adaptive memory arbiter additionally integrates a nonadjustable priority structure into the adaptive ranking system which guarantees faster service to the most urgent requests.

Abstract: A computer system includes an adaptive memory arbiter for prioritizing memory access requests, including a self-adjusting, programmable request-priority ranking system. The memory arbiter adapts during every arbitration cycle, reducing the priority of any request which wins memory arbitration. Thus, a memory request initially holding a low priority ranking may gradually advance in priority until that request wins memory arbitration. Such a scheme prevents lower-priority devices from becoming “memory-starved.” Because some types of memory requests (such as refresh requests and memory reads) inherently require faster memory access than other requests (such as memory writes), the adaptive memory arbiter additionally integrates a nonadjustable priority structure into the adaptive ranking system which guarantees faster service to the most urgent requests.

Abstract: A computer system includes a CPU, a memory device, two expansion buses, and a bridge logic unit coupling together the CPU, the memory device and the expansion buses. The CPU couples to the bridge logic unit via a CPU bus and the memory device couples to the bridge logic unit via a memory bus. The bridge logic unit generally routes bus cycle requests from one of the four buses to another of the buses while concurrently routing bus cycle requests to another pair of buses. The bridge logic unit preferably includes four interfaces, one each to the CPU, memory device and the two expansion buses. Each pair of interfaces are coupled by at least one queue; write requests are stored (or “posted”) in write queues and read data are stored in read queues.