Patents by Inventor Jeffrey Cain

Jeffrey Cain has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240105394
    Abstract: A capacitor that is capable of exhibiting good electrical properties under a wide variety of different conditions is provided. The capacitor contains a capacitor element that includes a sintered porous anode body, a dielectric that overlies the anode body, and a solid electrolyte that overlies the dielectric and includes a conductive polymer. The capacitor also contains multiple exposed anode lead portions that are electrically connected to respective anode terminations and a planar cathode termination that is electrically connected to the solid electrolyte.
    Type: Application
    Filed: November 30, 2023
    Publication date: March 28, 2024
    Inventor: Jeffrey Cain
  • Patent number: 11894200
    Abstract: A capacitor that is capable of exhibiting good electrical properties under a wide variety of different conditions is provided. The capacitor contains a capacitor element that includes a sintered porous anode body, a dielectric that overlies the anode body, and a solid electrolyte that overlies the dielectric and includes a conductive polymer. The capacitor also contains multiple exposed anode lead portions that are electrically connected to respective anode terminations and a planar cathode termination that is electrically connected to the solid electrolyte.
    Type: Grant
    Filed: September 3, 2021
    Date of Patent: February 6, 2024
    Assignee: KYOCERA AVX Components Corporation
    Inventor: Jeffrey Cain
  • Publication number: 20230368985
    Abstract: An ultracapacitor module is disclosed. The ultracapacitor module comprises: an enclosure, and a plurality of ultracapacitors housed within the enclosure wherein at least one ultracapacitor of the plurality of ultracapacitors is secured to the enclosure. The ultracapacitor module satisfies one or more of the following conditions upon being subjected to a vibration profile in accordance with ISO 16750-3-2012, Table 12 and IEC 60068-2-64: a capacitance within a rated capacitance value as determined in accordance IEC 62391-1, Method 1A, an equivalent series resistance within a rated equivalent series resistance value as determined in accordance IEC 62391-1, a leakage current within a rated leakage current value as determined in accordance IEC 62391-1, an operating voltage with a rated operating voltage value.
    Type: Application
    Filed: July 14, 2023
    Publication date: November 16, 2023
    Inventors: Shelby Bartley, Jeffrey Cain, Joseph M. Hock
  • Patent number: 11749924
    Abstract: A medical sensor patch connector assembly can include a medical patch having a first side, a second side opposite the first side, and a hole connecting the first side and the second side. The medical sensor patch connector assembly can include a connector including a first clamping member having a first contact surface in contact with the first side of the medial patch and a tab protruding through the hole in the medical patch. The connector can include a second clamping member having a second contact surface in contact with the second side of the medical patch.
    Type: Grant
    Filed: June 24, 2021
    Date of Patent: September 5, 2023
    Assignee: KYOCERA AVX Components Corporation
    Inventors: Shelby Bartley, Jeffrey Cain, Joseph M. Hock
  • Patent number: 11742156
    Abstract: An ultracapacitor module is disclosed. The ultracapacitor module comprises: an enclosure, and a plurality of ultracapacitors housed within the enclosure wherein at least one ultracapacitor of the plurality of ultracapacitors is secured to the enclosure. The ultracapacitor module satisfies one or more of the following conditions upon being subjected to a vibration profile in accordance with ISO 16750-3-2012, Table 12 and IEC 60068-2-64: a capacitance within a rated capacitance value as determined in accordance IEC 62391-1, Method 1A, an equivalent series resistance within a rated equivalent series resistance value as determined in accordance IEC 62391-1, a leakage current within a rated leakage current value as determined in accordance IEC 62391-1, an operating voltage with a rated operating voltage value.
    Type: Grant
    Filed: October 26, 2021
    Date of Patent: August 29, 2023
    Assignee: KYOCERA AVX Components Corporation
    Inventors: Shelby Bartley, Jeffrey Cain, Joseph M. Hock
  • Patent number: 11636978
    Abstract: The present invention is directed to a multilayer capacitor and a circuit board containing the multilayer capacitor. The capacitor includes a main body containing a first set of alternating dielectric layers and internal electrode layers and a second set of alternating dielectric layers and internal electrode layers. Each set contains a first internal electrode layer and a second internal electrode layer wherein each layer includes a top edge, a bottom edge opposite the top edge, and two side edges that define a main body of the layer. Each layer contains at least one lead tab extending from the top edge of the main body of the layer and at least one lead tab extending from the bottom edge of the main body of the layer wherein the lead tabs are offset from the side edges of the main body of the layer.
    Type: Grant
    Filed: May 15, 2018
    Date of Patent: April 25, 2023
    Assignee: KYOCERA AVX Components Corporation
    Inventor: Jeffrey Cain
  • Publication number: 20230026454
    Abstract: A data center rack is disclosed. The data center rack comprises a plurality of chamber openings including computing devices; and at least one chamber opening including a mounted ultracapacitor module comprising a plurality of ultracapacitors. A data center comprising a data center rack is also disclosed.
    Type: Application
    Filed: July 1, 2022
    Publication date: January 26, 2023
    Inventors: Jeffrey Cain, Joseph N. Hock, Shelby Bartley
  • Publication number: 20230019800
    Abstract: The present invention is directed to a multilayer capacitor and a circuit board containing the multilayer capacitor. The capacitor includes a main body containing a set of alternating dielectric layers and internal electrode layers wherein the set contains a first internal electrode layer and a second internal electrode layer and each internal electrode layer includes a top edge, a bottom edge opposite the top edge, and two side edges extending between the top edge and the bottom edge that define a main body of the internal electrode layer.
    Type: Application
    Filed: July 7, 2022
    Publication date: January 19, 2023
    Inventor: Jeffrey Cain
  • Publication number: 20220392705
    Abstract: The present invention is directed to a multilayer capacitor and a circuit board containing the multilayer capacitor. The capacitor includes a main body containing a first set of alternating dielectric layers and internal electrode layers and a second set of alternating dielectric layers and internal electrode layers. Each set contains a first internal electrode layer and a second internal electrode layer wherein each layer includes a top edge, a bottom edge opposite the top edge, and two side edges that define a main body of the layer. Each layer contains at least one lead tab extending from the top edge of the main body of the layer and at least one lead tab extending from the bottom edge of the main body of the layer wherein the lead tabs are offset from the side edges of the main body of the layer.
    Type: Application
    Filed: August 18, 2022
    Publication date: December 8, 2022
    Inventor: Jeffrey Cain
  • Publication number: 20220328248
    Abstract: The present invention is directed to a multilayer ceramic capacitor. The capacitor comprises a top surface, a bottom surface, and at least one side surface connecting the top surface and the bottom surface. The capacitor comprises a main body containing a plurality of alternating dielectric layers and internal electrode layers comprising a first plurality of internal electrode layers and a second plurality of internal electrode layers. A first through-hole conductive via electrically connects the first plurality of internal electrode layers to a first external terminal on the top surface and a first external terminal on the bottom surface of the capacitor. A second through-hole conductive via electrically connects the second plurality of internal electrode layers to a second external terminal on the top surface and a second external terminal on the bottom surface of the capacitor. The at least one side surface does not include an external terminal.
    Type: Application
    Filed: June 27, 2022
    Publication date: October 13, 2022
    Inventors: Marianne Berolini, Jeffrey Horn, Jeffrey Cain
  • Patent number: 11373809
    Abstract: The present invention is directed to a multilayer ceramic capacitor. The capacitor comprises a top surface, a bottom surface, and at least one side surface connecting the top surface and the bottom surface. The capacitor comprises a main body containing a plurality of alternating dielectric layers and internal electrode layers comprising a first plurality of internal electrode layers and a second plurality of internal electrode layers. A first through-hole conductive via electrically connects the first plurality of internal electrode layers to a first external terminal on the top surface and a first external terminal on the bottom surface of the capacitor. A second through-hole conductive via electrically connects the second plurality of internal electrode layers to a second external terminal on the top surface and a second external terminal on the bottom surface of the capacitor. The at least one side surface does not include an external terminal.
    Type: Grant
    Filed: February 12, 2020
    Date of Patent: June 28, 2022
    Assignee: KYOCERA AVX Components Corporation
    Inventors: Marianne Berolini, Jeffrey Horn, Jeffrey Cain
  • Publication number: 20220130622
    Abstract: An ultracapacitor module is disclosed. The ultracapacitor module comprises: an enclosure, and a plurality of ultracapacitors housed within the enclosure wherein at least one ultracapacitor of the plurality of ultracapacitors is secured to the enclosure. The ultracapacitor module satisfies one or more of the following conditions upon being subjected to a vibration profile in accordance with ISO 16750-3-2012, Table 12 and IEC 60068-2-64: a capacitance within a rated capacitance value as determined in accordance IEC 62391-1, Method 1A, an equivalent series resistance within a rated equivalent series resistance value as determined in accordance IEC 62391-1, a leakage current within a rated leakage current value as determined in accordance IEC 62391-1, an operating voltage with a rated operating voltage value.
    Type: Application
    Filed: October 26, 2021
    Publication date: April 28, 2022
    Inventors: Shelby Bartley, Jeffrey Cain, Joseph M. Hock
  • Patent number: 11295899
    Abstract: A controller and system for tuning a voltage tunable capacitor is provided. The controller may include at least one analog-to-digital converter configured to receive at least one input signal and convert the at least one input signal into at least one digital signal. The controller may include a processor configured to process the at least one digital signal using logic to generate an output signal. The controller may include a charge pump configured to boost the output signal to generate a boosted output signal. The controller may be configured to provide the boosted output signal to the voltage tunable capacitor to adjust a bias voltage of the voltage tunable capacitor.
    Type: Grant
    Filed: December 19, 2019
    Date of Patent: April 5, 2022
    Assignee: KYOCERA AVX Components Corporation
    Inventors: Jeffrey Cain, Joseph M. Hock
  • Publication number: 20220093343
    Abstract: A capacitor that is capable of exhibiting good electrical properties under a wide variety of different conditions is provided. The capacitor contains a capacitor element that includes a sintered porous anode body, a dielectric that overlies the anode body, and a solid electrolyte that overlies the dielectric and includes a conductive polymer. The capacitor also contains multiple exposed anode lead portions that are electrically connected to respective anode terminations and a planar cathode termination that is electrically connected to the solid electrolyte.
    Type: Application
    Filed: September 3, 2021
    Publication date: March 24, 2022
    Inventor: Jeffrey Cain
  • Publication number: 20220069502
    Abstract: An electrical connector is disclosed including an outer sleeve and an inner sleeve received within the outer sleeve such that the inner sleeve contacts the outer sleeve and can slide relative to the outer sleeve in a first direction. The electrical connector can include a resilient member configured to bias the inner sleeve away from the outer sleeve in the first direction and an insulating layer covering at least a portion of the outer sleeve. The electrical connector can include a grounding layer covering at least a portion of the insulating layer. The insulating layer can electrically insulate the outer grounding layer from the outer sleeve.
    Type: Application
    Filed: August 27, 2021
    Publication date: March 3, 2022
    Inventor: Jeffrey Cain
  • Publication number: 20220013943
    Abstract: A medical sensor patch connector assembly can include a medical patch having a first side, a second side opposite the first side, and a hole connecting the first side and the second side. The medical sensor patch connector assembly can include a connector including a first clamping member having a first contact surface in contact with the first side of the medial patch and a tab protruding through the hole in the medical patch. The connector can include a second clamping member having a second contact surface in contact with the second side of the medical patch.
    Type: Application
    Filed: June 24, 2021
    Publication date: January 13, 2022
    Inventors: Shelby Bartley, Jeffrey Cain, Joseph M. Hock
  • Patent number: 11139115
    Abstract: The present invention is directed to a surface mount coupling capacitor and a circuit board containing a surface mount coupling capacitor. The coupling capacitor includes a main body containing at least two sets of alternating dielectric layers and internal electrode layers. The coupling capacitor includes external terminals electrically connected to the internal electrode layers wherein the external terminals are formed on a top surface of the coupling capacitor and a bottom surface of the coupling capacitor opposing the top surface of the coupling capacitor.
    Type: Grant
    Filed: May 29, 2020
    Date of Patent: October 5, 2021
    Assignee: AVX Corporation
    Inventor: Jeffrey Cain
  • Publication number: 20200303127
    Abstract: The present invention is directed to a surface mount coupling capacitor and a circuit board containing a surface mount coupling capacitor. The coupling capacitor includes a main body containing at least two sets of alternating dielectric layers and internal electrode layers. The coupling capacitor includes external terminals electrically connected to the internal electrode layers wherein the external terminals are formed on a top surface of the coupling capacitor and a bottom surface of the coupling capacitor opposing the top surface of the coupling capacitor.
    Type: Application
    Filed: May 29, 2020
    Publication date: September 24, 2020
    Inventor: Jeffrey Cain
  • Publication number: 20200258688
    Abstract: The present invention is directed to a multilayer ceramic capacitor. The capacitor comprises a top surface, a bottom surface, and at least one side surface connecting the top surface and the bottom surface. The capacitor comprises a main body containing a plurality of alternating dielectric layers and internal electrode layers comprising a first plurality of internal electrode layers and a second plurality of internal electrode layers. A first through-hole conductive via electrically connects the first plurality of internal electrode layers to a first external terminal on the top surface and a first external terminal on the bottom surface of the capacitor. A second through-hole conductive via electrically connects the second plurality of internal electrode layers to a second external terminal on the top surface and a second external terminal on the bottom surface of the capacitor. The at least one side surface does not include an external terminal.
    Type: Application
    Filed: February 12, 2020
    Publication date: August 13, 2020
    Inventors: Marianne Berolini, Jeffrey Horn, Jeffrey Cain
  • Publication number: 20200211783
    Abstract: A controller and system for tuning a voltage tunable capacitor is provided. The controller may include at least one analog-to-digital converter configured to receive at least one input signal and convert the at least one input signal into at least one digital signal. The controller may include a processor configured to process the at least one digital signal using logic to generate an output signal. The controller may include a charge pump configured to boost the output signal to generate a boosted output signal. The controller may be configured to provide the boosted output signal to the voltage tunable capacitor to adjust a bias voltage of the voltage tunable capacitor.
    Type: Application
    Filed: December 19, 2019
    Publication date: July 2, 2020
    Inventors: Jeffrey Cain, Joseph M. Hock