Patents by Inventor Jeffrey D. Mitchell

Jeffrey D. Mitchell has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7536494
    Abstract: A system includes a first bus, a master device coupled to the first bus, and one or more subsystems coupled to the first bus. A respective subsystem includes a second bus, one or more slave devices coupled to the second bus, a write buffer to receive incoming signals from the master device via the first bus and to transmit signals to the one or more slave devices via the second bus in response to the incoming signals, and a read buffer to receive outgoing signals from the one or more slave devices via the second bus and to transmit signals to the master device via the first bus in response to the outgoing signals.
    Type: Grant
    Filed: May 22, 2007
    Date of Patent: May 19, 2009
    Assignee: Rambus Inc.
    Inventors: Bruno W. Garlepp, Richard M. Barth, Kevin S. Donnelly, Ely K. Tsern, Craig E. Hampel, Jeffrey D. Mitchell, James A. Gasbarro, Billy W. Garrett, Jr., Fredrick A. Ware, Donald V. Perino
  • Patent number: 7222209
    Abstract: A bus system for use with addressable memory has a global bus of bidirectional signal lines. The global bus has a first end and a second end. A master device transmits data to and receives data from the global bus at the first end. A global bus terminator is coupled to the global bus at the second end. One or more slave devices, including a last slave device at a furthest distance from the master device, each includes an active terminator coupled to at least some of the bidirectional signal lines of the global bus. The active terminator of only the last slave device is enabled.
    Type: Grant
    Filed: December 16, 2003
    Date of Patent: May 22, 2007
    Assignee: Rambus, Inc.
    Inventors: Bruno W. Garlepp, Richard M. Barth, Kevin S. Donnelly, Ely K. Tsern, Craig E. Hampel, Jeffrey D. Mitchell, James A. Gasbarro, Billy W. Garrett, Jr., Fredrick A. Ware, Donald V. Perino
  • Publication number: 20040196064
    Abstract: A bus system for use with addressable memory has a global bus of bidirectional signal lines. The global bus has a first end and a second end. A master device transmits data to and receives data from the global bus at the first end. A global bus terminator is coupled to the global bus at the second end. One or more slave devices, including a last slave device at a furthest distance from the master device, each includes an active terminator coupled to at least some of the bidirectional signal lines of the global bus. The active terminator of only the last slave device is enabled.
    Type: Application
    Filed: December 16, 2003
    Publication date: October 7, 2004
    Applicant: Rambus Inc.
    Inventors: Bruno W. Garlepp, Richard M. Barth, Kevin S. Donnelly, Ely K. Tsern, Craig E. Hampel, Jeffrey D. Mitchell, James A. Gasbarro, Billy W. Garrett, Fredrick A. Ware, Donald V. Perino
  • Patent number: 6687780
    Abstract: A bus system for use with addressable memory has a global bus of uni-directional signal lines. The global bus has a first end and a second end. A master device transmits data to and receives data from the global bus. First and second global bus terminators are coupled to the first and second ends of the global bus, respectively. One or more subsystems are connected in parallel to each other and to the master device via the global bus. Each subsystem includes a local bus, one or more slave devices coupled to the local bus, a write buffer that receives incoming signals from the master device via the global bus and transmits the incoming signals to the one or more slave devices via the local bus, and a read buffer that receives outgoing signals from the one or more slave devices via the local bus and transmits the outgoing signals to the master device via the global bus.
    Type: Grant
    Filed: November 2, 2000
    Date of Patent: February 3, 2004
    Assignee: Rambus Inc.
    Inventors: Bruno W. Garlepp, Richard M. Barth, Kevin S. Donnelly, Ely K. Tsern, Craig E. Hampel, Jeffrey D. Mitchell, James A. Gasbarro, Billy W. Garrett, Jr., Fredrick A. Ware, Donald V. Perino