Abstract: A method for producing yield enhancement data from integrated circuits on a substrate. A database of defects on the substrate is compared to a database of design information for the integrated circuits. The defects on the substrate are associated with classes of design information to produce the yield enhancement data.

Abstract: An integrated circuit having a gate region, a source drain region, and an electrically nonconductive spacer separating the gate region and the source drain region. A local interconnect electrically connects the gate region to the source drain region across the electrically nonconductive spacer. The local interconnect is formed of a semiconducting material reacted with a metal. The local interconnect may be formed by implanting a precursor species into the electrically nonconductive spacer. A metal layer is deposited over at least the electrically nonconductive spacer, and the integrated circuit is heated to form an electrically conductive local interconnect from the metal layer and the precursor species implanted in the electrically nonconductive spacer.

Abstract: An integrated circuit having a gate region, a source drain region, and an electrically nonconductive spacer separating the gate region and the source drain region. A local interconnect electrically connects the gate region to the source drain region across the electrically nonconductive spacer. The local interconnect is formed of a semiconducting material reacted with a metal. The local interconnect may be formed by implanting a precursor species into the electrically nonconductive spacer. A metal layer is deposited over at least the electrically nonconductive spacer, and the integrated circuit is heated to form an electrically conductive local interconnect from the metal layer and the precursor species implanted in the electrically nonconductive spacer.

Abstract: An integrated circuit having a gate region, a source drain region, and an electrically nonconductive spacer separating the gate region and the source drain region. A local interconnect electrically connects the gate region to the source drain region across the electrically nonconductive spacer. The local interconnect is formed of a semiconducting material reacted with a metal. The local interconnect may be formed by implanting a precursor species into the electrically nonconductive spacer. A metal layer is deposited over at least the electrically nonconductive spacer, and the integrated circuit is heated to form an electrically conductive local interconnect from the metal layer and the precursor species implanted in the electrically nonconductive spacer.

Abstract: Conductive plugs (28) are formed in a semiconductor device (10) using a chemical mechanical polishing (CMP) process. A blanket conductive layer (26), for example of tungsten, is deposited in a plug opening (24). The conductive layer is polished back by CMP using a slurry comprised of either copper sulfate (CuSO.sub.4) or copper perchlorate [Cu(ClO.sub.4).sub.2 ] and an abrasive, such as alumina or silica, and water. In another embodiment, a CMP process using such slurries may be used to form conductive interconnects (50) in a semiconductor device (40).