Patents by Inventor Jeffrey K. Lassahn
Jeffrey K. Lassahn has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230362386Abstract: An apparatus including a first module and a second module. The first module may be configured to generate one or more values based upon an analysis of one or more samples of a first frame. The second module may be configured to encode one or more samples of a second frame taking into account the one or more values generated by the first module. The one or more values generally represent a measure of an effect on the one or more samples of the first frame of encoding decisions made during encoding of the one or more samples of the second frame.Type: ApplicationFiled: July 19, 2023Publication date: November 9, 2023Inventor: Jeffrey K. Lassahn
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Patent number: 11778193Abstract: An apparatus including a first module and a second module. The first module may be configured to generate one or more values based upon an analysis of one or more samples of a first frame. The second module may be configured to encode one or more samples of a second frame taking into account the one or more values generated by the first module. The one or more values generally represent a measure of an effect on the one or more samples of the first frame of encoding decisions made during encoding of the one or more samples of the second frame.Type: GrantFiled: January 16, 2020Date of Patent: October 3, 2023Assignee: Amazon Technologies, Inc.Inventor: Jeffrey K. Lassahn
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Patent number: 10719433Abstract: An apparatus includes a central processing unit and a parallel processing unit. The parallel processing unit includes an array of software-configurable general purpose processors, a globally-shared memory, and a shared memory. Each of the software-configurable general purpose processors in the array of software-configurable general purpose processors has access to the globally-shared memory to execute one or more portions of at least one of (i) a decoding program, (ii) an encoding program, and (iii) an encoding and decoding program. The shared memory is accessible by the central processing unit to program the shared memory with a map array describing a position of block data in one or more associated arrays.Type: GrantFiled: November 12, 2018Date of Patent: July 21, 2020Assignee: Amazon Technologies, Inc.Inventors: Jeffrey K. Lassahn, Timothy B. Prins
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Publication number: 20200154109Abstract: An apparatus including a first module and a second module. The first module may be configured to generate one or more values based upon an analysis of one or more samples of a first frame. The second module may be configured to encode one or more samples of a second frame taking into account the one or more values generated by the first module. The one or more values generally represent a measure of an effect on the one or more samples of the first frame of encoding decisions made during encoding of the one or more samples of the second frame.Type: ApplicationFiled: January 16, 2020Publication date: May 14, 2020Inventor: Jeffrey K. Lassahn
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Patent number: 10602151Abstract: An apparatus including a first module and a second module. The first module may be configured to generate one or more values based upon an analysis of one or more samples of a first frame. The second module may be configured to encode one or more samples of a second frame taking into account the one or more values generated by the first module. The one or more values generally represent a measure of an effect on the one or more samples of the first frame of encoding decisions made during encoding of the one or more samples of the second frame.Type: GrantFiled: September 30, 2011Date of Patent: March 24, 2020Assignee: AMAZON TECHNOLOGIES, INC.Inventor: Jeffrey K. Lassahn
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Patent number: 10306249Abstract: An apparatus includes a central processing unit and a parallel processing unit. The parallel processing unit generally includes an array of software-configurable general purpose processors, a globally shared memory, and a shared memory. Each of the software-configurable general purpose processors in the array of software-configurable general purpose processors generally has access to the globally shared memory to execute one or more portions of a decoding program. The shared memory is accessible by the central processing unit to program the shared memory with a schedule describing which of the one or more portions of the decoding program are to be executed by each of the software-configurable general purpose processors.Type: GrantFiled: May 3, 2017Date of Patent: May 28, 2019Assignee: AMAZON TECHNOLOGIES, INC.Inventors: Timothy B. Prins, Jeffrey K. Lassahn
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Publication number: 20190087929Abstract: An apparatus includes a central processing unit and a parallel processing unit. The parallel processing unit includes an array of software-configurable general purpose processors, a globally-shared memory, and a shared memory. Each of the software-configurable general purpose processors in the array of software-configurable general purpose processors has access to the globally-shared memory to execute one or more portions of at least one of (i) a decoding program, (ii) an encoding program, and (iii) an encoding and decoding program. The shared memory is accessible by the central processing unit to program the shared memory with a map array describing a position of block data in one or more associated arrays.Type: ApplicationFiled: November 12, 2018Publication date: March 21, 2019Inventors: Jeffrey K. Lassahn, Timothy B. Prins
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Patent number: 10127624Abstract: An apparatus includes a central processing unit and a parallel processing unit. The parallel processing unit includes an array of software-configurable general purpose processors, a globally-shared memory, and a shared memory. Each of the software-configurable general purpose processors in the array of software-configurable general purpose processors has access to the globally-shared memory to execute one or more portions of at least one of (i) a decoding program, (ii) an encoding program, and (iii) an encoding and decoding program. The shared memory is accessible by the central processing unit to program the shared memory with a map array describing a position of block data in one or more associated arrays.Type: GrantFiled: February 1, 2013Date of Patent: November 13, 2018Assignee: Amazon Technologies, Inc.Inventors: Jeffrey K. Lassahn, Timothy B. Prins
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Publication number: 20170238002Abstract: An apparatus includes a central processing unit and a parallel processing unit. The parallel processing unit generally includes an array of software-configurable general purpose processors, a globally shared memory, and a shared memory. Each of the software-configurable general purpose processors in the array of software-configurable general purpose processors generally has access to the globally shared memory to execute one or more portions of a decoding program. The shared memory is accessible by the central processing unit to program the shared memory with a schedule describing which of the one or more portions of the decoding program are to be executed by each of the software-configurable general purpose processors.Type: ApplicationFiled: May 3, 2017Publication date: August 17, 2017Inventors: Timothy B. Prins, Jeffrey K. Lassahn
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Patent number: 9667985Abstract: An apparatus includes a central processing unit and a parallel processing unit. The parallel processing unit generally includes an array of software-configurable general purpose processors, a globally shared memory, and a shared memory. Each of the software-configurable general purpose processors in the array of software-configurable general purpose processors generally has access to the globally shared memory to execute one or more portions of a decoding program. The shared memory is accessible by the central processing unit to program the shared memory with a schedule describing which of the one or more portions of the decoding program are to be executed by each of the software-configurable general purpose processors.Type: GrantFiled: August 20, 2015Date of Patent: May 30, 2017Assignee: Amazon Technologies, Inc.Inventors: Timothy B. Prins, Jeffrey K. Lassahn
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Patent number: 9172923Abstract: An apparatus includes a central processing unit and a parallel processing unit. The parallel processing unit generally includes an array of software-configurable general purpose processors, a globally shared memory, and a shared memory. Each of the software-configurable general purpose processors in the array of software-configurable general purpose processors generally has access to the globally shared memory to execute one or more portions of a decoding program. The shared memory is accessible by the central processing unit to program the shared memory with a schedule describing which of the one or more portions of the decoding program are to be executed by each of the software-configurable general purpose processors.Type: GrantFiled: December 20, 2012Date of Patent: October 27, 2015Assignee: Elemental Technologies, Inc.Inventors: Timothy B. Prins, Jeffrey K. Lassahn
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Patent number: 7456977Abstract: A wireless substrate-like sensor is provided to facilitate alignment and calibration of semiconductor processing systems. The wireless substrate-like sensor includes an optical image acquisition system that acquires one or more images of targets placed within the semiconductor processing system. Analysis of images of the targets obtained by the wireless substrate-like sensor provides position and/or orientation information in at least three degrees of freedom. An additional target is affixed to a known location within the semiconductor processing system such that imaging the reference position with the wireless substrate-like sensor allows the measurement and compensation for pick-up errors.Type: GrantFiled: March 15, 2006Date of Patent: November 25, 2008Assignee: CyberOptics Semiconductor, Inc.Inventors: Craig C. Ramsey, Jeffrey K. Lassahn, Greg Huntzinger, DelRae H. Gardner
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Patent number: 7289230Abstract: A wireless substrate-like sensor is provided to facilitate alignment and calibration of semiconductor processing systems. The wireless substrate-like sensor includes an optical image acquisition system that acquires one or more images of targets placed within the semiconductor processing system. Analysis of images of the targets obtained by the wireless substrate-like sensor provides position and/or orientation information in at least three degrees of freedom. An additional target is affixed to a known location within the semiconductor processing system such that imaging the reference position with the wireless substrate-like sensor allows the measurement and compensation for pick-up errors.Type: GrantFiled: January 31, 2003Date of Patent: October 30, 2007Assignee: CyberOptics Semiconductors, Inc.Inventors: Craig C. Ramsey, Jeffrey K. Lassahn, Greg Huntzinger, DelRae H. Gardner
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Patent number: 7283255Abstract: A wireless substrate-like sensor is provided to facilitate alignment and calibration of semiconductor processing systems. The wireless substrate-like sensor includes an optical image acquisition system that acquires one or more images of targets placed within the semiconductor processing system. Analysis of images of the targets obtained by the wireless substrate-like sensor provides position and/or orientation information in at least three degrees of freedom. An additional target is affixed to a known location within the semiconductor processing system such that imaging the reference position with the wireless substrate-like sensor allows the measurement and compensation for pick-up errors.Type: GrantFiled: March 1, 2006Date of Patent: October 16, 2007Assignee: CyberOptics Semiconductor, Inc.Inventors: Craig C. Ramsey, Jeffrey K. Lassahn, Greg Huntzinger, DelRae H. Gardner
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Publication number: 20030223057Abstract: A wireless substrate-like sensor is provided to facilitate alignment and calibration of semiconductor processing systems. The wireless substrate-like sensor includes an optical image acquisition system that acquires one or more images of targets placed within the semiconductor processing system. Analysis of images of the targets obtained by the wireless substrate-like sensor provides position and/or orientation information in at least three degrees of freedom. An additional target is affixed to a known location within the semiconductor processing system such that imaging the reference position with the wireless substrate-like sensor allows the measurement and compensation for pick-up errors.Type: ApplicationFiled: January 31, 2003Publication date: December 4, 2003Inventors: Craig C. Ramsey, Jeffrey K. Lassahn, Greg Huntzinger, DelRae H. Gardner