Patents by Inventor Jeffrey K. Lassahn

Jeffrey K. Lassahn has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230362386
    Abstract: An apparatus including a first module and a second module. The first module may be configured to generate one or more values based upon an analysis of one or more samples of a first frame. The second module may be configured to encode one or more samples of a second frame taking into account the one or more values generated by the first module. The one or more values generally represent a measure of an effect on the one or more samples of the first frame of encoding decisions made during encoding of the one or more samples of the second frame.
    Type: Application
    Filed: July 19, 2023
    Publication date: November 9, 2023
    Inventor: Jeffrey K. Lassahn
  • Patent number: 11778193
    Abstract: An apparatus including a first module and a second module. The first module may be configured to generate one or more values based upon an analysis of one or more samples of a first frame. The second module may be configured to encode one or more samples of a second frame taking into account the one or more values generated by the first module. The one or more values generally represent a measure of an effect on the one or more samples of the first frame of encoding decisions made during encoding of the one or more samples of the second frame.
    Type: Grant
    Filed: January 16, 2020
    Date of Patent: October 3, 2023
    Assignee: Amazon Technologies, Inc.
    Inventor: Jeffrey K. Lassahn
  • Patent number: 10719433
    Abstract: An apparatus includes a central processing unit and a parallel processing unit. The parallel processing unit includes an array of software-configurable general purpose processors, a globally-shared memory, and a shared memory. Each of the software-configurable general purpose processors in the array of software-configurable general purpose processors has access to the globally-shared memory to execute one or more portions of at least one of (i) a decoding program, (ii) an encoding program, and (iii) an encoding and decoding program. The shared memory is accessible by the central processing unit to program the shared memory with a map array describing a position of block data in one or more associated arrays.
    Type: Grant
    Filed: November 12, 2018
    Date of Patent: July 21, 2020
    Assignee: Amazon Technologies, Inc.
    Inventors: Jeffrey K. Lassahn, Timothy B. Prins
  • Publication number: 20200154109
    Abstract: An apparatus including a first module and a second module. The first module may be configured to generate one or more values based upon an analysis of one or more samples of a first frame. The second module may be configured to encode one or more samples of a second frame taking into account the one or more values generated by the first module. The one or more values generally represent a measure of an effect on the one or more samples of the first frame of encoding decisions made during encoding of the one or more samples of the second frame.
    Type: Application
    Filed: January 16, 2020
    Publication date: May 14, 2020
    Inventor: Jeffrey K. Lassahn
  • Patent number: 10602151
    Abstract: An apparatus including a first module and a second module. The first module may be configured to generate one or more values based upon an analysis of one or more samples of a first frame. The second module may be configured to encode one or more samples of a second frame taking into account the one or more values generated by the first module. The one or more values generally represent a measure of an effect on the one or more samples of the first frame of encoding decisions made during encoding of the one or more samples of the second frame.
    Type: Grant
    Filed: September 30, 2011
    Date of Patent: March 24, 2020
    Assignee: AMAZON TECHNOLOGIES, INC.
    Inventor: Jeffrey K. Lassahn
  • Patent number: 10306249
    Abstract: An apparatus includes a central processing unit and a parallel processing unit. The parallel processing unit generally includes an array of software-configurable general purpose processors, a globally shared memory, and a shared memory. Each of the software-configurable general purpose processors in the array of software-configurable general purpose processors generally has access to the globally shared memory to execute one or more portions of a decoding program. The shared memory is accessible by the central processing unit to program the shared memory with a schedule describing which of the one or more portions of the decoding program are to be executed by each of the software-configurable general purpose processors.
    Type: Grant
    Filed: May 3, 2017
    Date of Patent: May 28, 2019
    Assignee: AMAZON TECHNOLOGIES, INC.
    Inventors: Timothy B. Prins, Jeffrey K. Lassahn
  • Publication number: 20190087929
    Abstract: An apparatus includes a central processing unit and a parallel processing unit. The parallel processing unit includes an array of software-configurable general purpose processors, a globally-shared memory, and a shared memory. Each of the software-configurable general purpose processors in the array of software-configurable general purpose processors has access to the globally-shared memory to execute one or more portions of at least one of (i) a decoding program, (ii) an encoding program, and (iii) an encoding and decoding program. The shared memory is accessible by the central processing unit to program the shared memory with a map array describing a position of block data in one or more associated arrays.
    Type: Application
    Filed: November 12, 2018
    Publication date: March 21, 2019
    Inventors: Jeffrey K. Lassahn, Timothy B. Prins
  • Patent number: 10127624
    Abstract: An apparatus includes a central processing unit and a parallel processing unit. The parallel processing unit includes an array of software-configurable general purpose processors, a globally-shared memory, and a shared memory. Each of the software-configurable general purpose processors in the array of software-configurable general purpose processors has access to the globally-shared memory to execute one or more portions of at least one of (i) a decoding program, (ii) an encoding program, and (iii) an encoding and decoding program. The shared memory is accessible by the central processing unit to program the shared memory with a map array describing a position of block data in one or more associated arrays.
    Type: Grant
    Filed: February 1, 2013
    Date of Patent: November 13, 2018
    Assignee: Amazon Technologies, Inc.
    Inventors: Jeffrey K. Lassahn, Timothy B. Prins
  • Publication number: 20170238002
    Abstract: An apparatus includes a central processing unit and a parallel processing unit. The parallel processing unit generally includes an array of software-configurable general purpose processors, a globally shared memory, and a shared memory. Each of the software-configurable general purpose processors in the array of software-configurable general purpose processors generally has access to the globally shared memory to execute one or more portions of a decoding program. The shared memory is accessible by the central processing unit to program the shared memory with a schedule describing which of the one or more portions of the decoding program are to be executed by each of the software-configurable general purpose processors.
    Type: Application
    Filed: May 3, 2017
    Publication date: August 17, 2017
    Inventors: Timothy B. Prins, Jeffrey K. Lassahn
  • Patent number: 9667985
    Abstract: An apparatus includes a central processing unit and a parallel processing unit. The parallel processing unit generally includes an array of software-configurable general purpose processors, a globally shared memory, and a shared memory. Each of the software-configurable general purpose processors in the array of software-configurable general purpose processors generally has access to the globally shared memory to execute one or more portions of a decoding program. The shared memory is accessible by the central processing unit to program the shared memory with a schedule describing which of the one or more portions of the decoding program are to be executed by each of the software-configurable general purpose processors.
    Type: Grant
    Filed: August 20, 2015
    Date of Patent: May 30, 2017
    Assignee: Amazon Technologies, Inc.
    Inventors: Timothy B. Prins, Jeffrey K. Lassahn
  • Patent number: 9172923
    Abstract: An apparatus includes a central processing unit and a parallel processing unit. The parallel processing unit generally includes an array of software-configurable general purpose processors, a globally shared memory, and a shared memory. Each of the software-configurable general purpose processors in the array of software-configurable general purpose processors generally has access to the globally shared memory to execute one or more portions of a decoding program. The shared memory is accessible by the central processing unit to program the shared memory with a schedule describing which of the one or more portions of the decoding program are to be executed by each of the software-configurable general purpose processors.
    Type: Grant
    Filed: December 20, 2012
    Date of Patent: October 27, 2015
    Assignee: Elemental Technologies, Inc.
    Inventors: Timothy B. Prins, Jeffrey K. Lassahn
  • Patent number: 7456977
    Abstract: A wireless substrate-like sensor is provided to facilitate alignment and calibration of semiconductor processing systems. The wireless substrate-like sensor includes an optical image acquisition system that acquires one or more images of targets placed within the semiconductor processing system. Analysis of images of the targets obtained by the wireless substrate-like sensor provides position and/or orientation information in at least three degrees of freedom. An additional target is affixed to a known location within the semiconductor processing system such that imaging the reference position with the wireless substrate-like sensor allows the measurement and compensation for pick-up errors.
    Type: Grant
    Filed: March 15, 2006
    Date of Patent: November 25, 2008
    Assignee: CyberOptics Semiconductor, Inc.
    Inventors: Craig C. Ramsey, Jeffrey K. Lassahn, Greg Huntzinger, DelRae H. Gardner
  • Patent number: 7289230
    Abstract: A wireless substrate-like sensor is provided to facilitate alignment and calibration of semiconductor processing systems. The wireless substrate-like sensor includes an optical image acquisition system that acquires one or more images of targets placed within the semiconductor processing system. Analysis of images of the targets obtained by the wireless substrate-like sensor provides position and/or orientation information in at least three degrees of freedom. An additional target is affixed to a known location within the semiconductor processing system such that imaging the reference position with the wireless substrate-like sensor allows the measurement and compensation for pick-up errors.
    Type: Grant
    Filed: January 31, 2003
    Date of Patent: October 30, 2007
    Assignee: CyberOptics Semiconductors, Inc.
    Inventors: Craig C. Ramsey, Jeffrey K. Lassahn, Greg Huntzinger, DelRae H. Gardner
  • Patent number: 7283255
    Abstract: A wireless substrate-like sensor is provided to facilitate alignment and calibration of semiconductor processing systems. The wireless substrate-like sensor includes an optical image acquisition system that acquires one or more images of targets placed within the semiconductor processing system. Analysis of images of the targets obtained by the wireless substrate-like sensor provides position and/or orientation information in at least three degrees of freedom. An additional target is affixed to a known location within the semiconductor processing system such that imaging the reference position with the wireless substrate-like sensor allows the measurement and compensation for pick-up errors.
    Type: Grant
    Filed: March 1, 2006
    Date of Patent: October 16, 2007
    Assignee: CyberOptics Semiconductor, Inc.
    Inventors: Craig C. Ramsey, Jeffrey K. Lassahn, Greg Huntzinger, DelRae H. Gardner
  • Publication number: 20030223057
    Abstract: A wireless substrate-like sensor is provided to facilitate alignment and calibration of semiconductor processing systems. The wireless substrate-like sensor includes an optical image acquisition system that acquires one or more images of targets placed within the semiconductor processing system. Analysis of images of the targets obtained by the wireless substrate-like sensor provides position and/or orientation information in at least three degrees of freedom. An additional target is affixed to a known location within the semiconductor processing system such that imaging the reference position with the wireless substrate-like sensor allows the measurement and compensation for pick-up errors.
    Type: Application
    Filed: January 31, 2003
    Publication date: December 4, 2003
    Inventors: Craig C. Ramsey, Jeffrey K. Lassahn, Greg Huntzinger, DelRae H. Gardner