Patents by Inventor Jeffrey M. Harris

Jeffrey M. Harris has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11969501
    Abstract: Disclosed herein are compositions and methods for the treatment of otic disorders with immunomodulating agents and auris pressure modulators. In these methods, the auris compositions and formulations are administered locally to an individual afflicted with an otic disorder, through direct application of the immunomodulating and/or auris pressure modulating compositions and formulations onto the auris media and/or auris interna target areas, or via perfusion into the auris media and/or auris interna structures.
    Type: Grant
    Filed: August 18, 2021
    Date of Patent: April 30, 2024
    Assignees: DOMPÉ FARMACEUTICI S.P.A., THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Jay Lichter, Andrew M. Trammel, Fabrice Piu, Qiang Ye, Michael Christopher Scaife, Benedikt Vollrath, Sergio G. Duron, Luis A. Dellamary, Carl Lebel, Jeffrey P. Harris
  • Publication number: 20240118790
    Abstract: A computer readable media, a method, and a system registering a third party application providing an available communication system between a local user and a remote user identity, storing information related to the available communication system in a first database, obtaining contact information for the remote user identity from the third party application, determining a communication type for the third party application, pairing the remote user identity with a contact, and updating a graphical representation of contact information.
    Type: Application
    Filed: September 25, 2023
    Publication date: April 11, 2024
    Inventors: Jeffrey D. Harris, Joseph H. Engel, Keith Stattenfield, John-Peter E. Cafaro, Colter S. Reed, Bruce M. Stadnyk, James C. Wilson, David A. McLeod, Alexander B. Brown
  • Patent number: 9825812
    Abstract: Systems and techniques for transparently intercepting and optimizing resource requests are described. Some embodiments can send a request to a server. In response to the request, the embodiments can receive a first script and at least a second script from the server, wherein the first script includes instructions for intercepting invocations to a set of functions, and wherein the second script includes at least one invocation to at least one function in the set of functions. The first script can then be executed, thereby causing subsequent invocations to each function in the set of functions to be intercepted by a corresponding resource optimization handler. Next, the second script can be executed. When the executing second script invokes a function in the set of functions, the invocation of the function can be intercepted, and a resource optimization handler corresponding to the function can be invoked instead of invoking the function.
    Type: Grant
    Filed: July 9, 2014
    Date of Patent: November 21, 2017
    Assignee: Pulse Secure, LLC
    Inventors: Glenn C. Conner, Jeffrey M. Harris
  • Patent number: 9093058
    Abstract: A system is configured to test a pickup on a guitar without soldering the pickup to the guitar. The system includes an inverted pickup mechanically coupled to pickup wires. A testing system is connected to the inverted pickup and includes a base plate configured to accommodate the inverted pickup proximate strings on the guitar. Two leveling rods are configured to be threaded through the base plate and inserted through a pickup mounting plate while being immediately adjacent to the guitar on one end. A circuit board is attached to the base plate and configured to be electrically coupled to the pickup wires. The circuit board further comprises a phone jack which is configured to be electrically coupled to an amplifier. The amplifier emits sound which can be used to test the inverted pickup.
    Type: Grant
    Filed: March 28, 2014
    Date of Patent: July 28, 2015
    Inventor: Jeffrey M. Harris
  • Publication number: 20150163087
    Abstract: Systems and techniques for transparently intercepting and optimizing resource requests are described. Some embodiments can send a request to a server. In response to the request, the embodiments can receive a first script and at least a second script from the server, wherein the first script includes instructions for intercepting invocations to a set of functions, and wherein the second script includes at least one invocation to at least one function in the set of functions. The first script can then be executed, thereby causing subsequent invocations to each function in the set of functions to be intercepted by a corresponding resource optimization handler. Next, the second script can be executed. When the executing second script invokes a function in the set of functions, the invocation of the function can be intercepted, and a resource optimization handler corresponding to the function can be invoked instead of invoking the function.
    Type: Application
    Filed: July 9, 2014
    Publication date: June 11, 2015
    Inventors: Glenn C. Conner, Jeffrey M. Harris
  • Patent number: 7620047
    Abstract: A method of transporting a RapidIO packet (135) from an initiator RapidIO domain (102) over an IP packet network (110) to a receiver RapidIO domain (104) can include the initiator RapidIO domain creating the RapidIO packet and reading a destination domain ID (483) of the RapidIO packet, where the destination domain ID corresponds to the receiver RapidIO domain. The destination domain ID is mapped to a receiver RapidIO domain IP address (473). The RapidIO packet is encapsulated in an IP packet (436) and the IP packet is communicated to the receiver RapidIO domain over the IP packet network.
    Type: Grant
    Filed: November 23, 2004
    Date of Patent: November 17, 2009
    Assignee: Emerson Network Power - Embedded Computing, Inc.
    Inventors: Douglas L. Sandy, Jeffrey M. Harris, Robert C. Tufford
  • Patent number: 7561565
    Abstract: A multi-service platform system (100) includes a VXS backplane (104), a switched fabric (106) operating on the VXS backplane, a parallel bus (108) operating coincident with the switched fabric on the VXS backplane, a VXS payload module (102) coupled to the VXS backplane, and a storage module (110) coupled to the VXS payload module, wherein the storage module is coupled to communicate with the switched fabric.
    Type: Grant
    Filed: June 17, 2004
    Date of Patent: July 14, 2009
    Assignee: Emerson Network Power - Embedded Computing, Inc.
    Inventors: Jeffrey M. Harris, Robert C. Tufford
  • Patent number: 7539183
    Abstract: A multi-service platform system (100, 200) including a VMEbus network (102) and a switched fabric network (104) wherein the VMEbus network (102) and the switched fabric network (104) operate concurrently within the multi-service platform system (100, 200). Multi-service platform system (100, 200) can include a payload module (106) with a first switched fabric connector (210) in a P0 mechanical envelope (218) that is designed to interface with a corresponding first switched fabric connector (212) in the J0 mechanical envelope (220) on a backplane (204).
    Type: Grant
    Filed: June 24, 2002
    Date of Patent: May 26, 2009
    Assignee: Emerson Network Power - Embedded Computing, Inc.
    Inventors: Jeffrey M. Harris, Robert Tufford
  • Patent number: 7532616
    Abstract: A multi-service platform system, includes a backplane (104), a switched fabric (106) on the backplane, and at least one of a VMEbus network and a PCI network coincident with the switched fabric on the backplane. A payload module (102) has one of a 3U form factor, a 6U form factor and a 9U form factor, where the payload module is communicatively coupled with the backplane using the switched fabric and at least one of the VMEbus network and the PCI network. At least one multi-gigabit connector (118) is coupled to a rear edge (119) of the payload module, where the at least one multi-gigabit connector is coupled to communicatively interface the payload module to the backplane, and where the switched fabric and at least one of the VMEbus network and the PCI network are communicatively coupled with the payload module through the at least one multi-gigabit connector. A storage module (112, 113) is coupled to the payload module, where the storage module is coupled to communicate with the switched fabric.
    Type: Grant
    Filed: September 23, 2004
    Date of Patent: May 12, 2009
    Assignee: Emerson Network Power - Embedded Computing, Inc.
    Inventors: Douglas L. Sandy, Jeffrey M. Harris, Robert C. Tufford
  • Patent number: 7443844
    Abstract: A switched fabric mezzanine storage module (560) includes a storage module (562) and a switched fabric connector (563) coupled to the storage module. The storage module is coupled to directly communicate with a switched fabric (506), where the switched fabric storage mezzanine module is coupled to a payload module (502) having one of a 3U form factor, a 6U form factor and a 9U form factor. The payload module can include at least one multi-gigabit connector (518) coupled to a rear edge (519) of the payload module, where the at least one multi-gigabit connector is coupled to communicatively interface with a backplane (504).
    Type: Grant
    Filed: September 23, 2004
    Date of Patent: October 28, 2008
    Assignee: Emerson Network Power - Embedded Computing, Inc.
    Inventors: Douglas L. Sandy, Jeffrey M. Harris, Robert C. Tufford
  • Patent number: 7440450
    Abstract: A multi-service platform system, includes a backplane (104), a switched fabric (106) on the backplane, and at least one of a VMEbus network and a PCI network coincident with the switched fabric on the backplane. A payload module (102) has one of a 3U form factor, a 6U form factor and a 9U form factor, where the payload module is communicatively coupled with the backplane using the switched fabric and at least one of the VMEbus network and the PCI network. At least one multi-gigabit connector (118) is coupled to a rear edge (119) of the payload module, where the at least one multi-gigabit connector is coupled to communicatively interface the payload module to the backplane, and where the switched fabric and at least one of the VMEbus network and the PCI network are communicatively coupled with the payload module through the at least one multi-gigabit connector.
    Type: Grant
    Filed: September 23, 2004
    Date of Patent: October 21, 2008
    Assignee: Emerson Network Power-Embedded Computing, Inc.
    Inventors: Jeffrey M. Harris, Douglas L. Sandy, Robert C. Tufford
  • Patent number: 7307987
    Abstract: A payload module (202) includes a payload subunit (212) coupled to the payload module, where the payload module has one of a 3U form factor, a 6U form factor and a 9U form factor. At least one multi-gigabit connector (218) is coupled to a rear edge (219) of the payload module and to the payload subunit, where the at least one multi-gigabit connector is coupled to communicatively interface the payload subunit to a backplane (204), where the backplane includes a switched fabric (206) coincident with at least one of a VMEbus network and a PCI network, and where the switched fabric and at least one of the VMEbus network and the PCI network are communicatively coupled with the payload subunit through the at least one multi-gigabit connector.
    Type: Grant
    Filed: September 23, 2004
    Date of Patent: December 11, 2007
    Assignee: Motorola, Inc.
    Inventors: Robert C. Tufford, Jeffrey M. Harris, Douglas L. Sandy
  • Patent number: 7254659
    Abstract: A method of performing a VMEbus split-read transaction (701) includes providing a master VMEbus module (502) coupled to a slave VMEbus module (504) through a VMEbus network (506). The master VMEbus module initiates a VMEbus split-read transaction request (524) in a VME address encoding phase (601) to the slave VMEbus module, where the VMEbus split-read transaction request comprises a return address (660) for the VMEbus master module in the VMEbus address encoding phase, and where the VMEbus split-read transaction request requests a set of data (544). The master VMEbus module releases the VMEbus network and the slave VMEbus module acquires the VMEbus network. The slave VMEbus module places the set of data on the VMEbus network, where the set of data comprises the return address for the VMEbus master module, and the master VMEbus module retrieves the set of data.
    Type: Grant
    Filed: July 26, 2004
    Date of Patent: August 7, 2007
    Assignee: Motorola, Inc.
    Inventors: Jeffrey M. Harris, Malcolm J. Rush
  • Patent number: 7254039
    Abstract: A multi-service platform system (100, 200, 300, 400) includes a computer chassis (101, 201, 301, 401) having a plurality of 3U slots (205), a backplane (104) integrated in the computer chassis, a switched fabric (106) on the backplane. At least one of a VMEbus network and a PCI network are coincident with the switched fabric on the backplane. A payload module (102) having a 3U form factor is coupled to interface with one of the plurality of 3U slots, where the payload module is communicatively coupled with the backplane using the switched fabric and at least one of the VMEbus network and the PCI network. At least one multi-gigabit connector (118) is coupled to a rear edge (119) of the payload module, where the at least one multi-gigabit connector is coupled to communicatively interface the payload module to the backplane, and where the switched fabric and at least one of the VMEbus network and the PCI network are communicatively coupled with the payload module through the at least one multi-gigabit connector.
    Type: Grant
    Filed: October 25, 2004
    Date of Patent: August 7, 2007
    Assignee: Motorola, Inc.
    Inventors: Douglas L. Sandy, Jeffrey M. Harris, Robert C. Tufford
  • Patent number: 7155549
    Abstract: A method of performing a VMEbus split-read transaction (401) includes providing a master VMEbus module (102) coupled to a slave VMEbus module (104) through a VMEbus network (106). The master VMEbus module initiates a VMEbus split-read transaction request (124) in a VME address encoding phase (201) to the slave VMEbus module, where the VMEbus split-read transaction request includes a tag identifier (206, 306) in the VMEbus address encoding phase corresponding to the VMEbus split-read transaction request, where the tag identifier is unique to the VMEbus split-read transaction request, and where the VMEbus split-read transaction request requests a set of data (144). The master VMEbus module releases the VMEbus network and the slave VMEbus module acquires the VMEbus network. The slave VMEbus module places the set of data on the VMEbus network, wherein the set of data includes the tag identifier.
    Type: Grant
    Filed: July 26, 2004
    Date of Patent: December 26, 2006
    Inventors: Malcolm J. Rush, Jeffrey M. Harris
  • Patent number: 7154747
    Abstract: A switch module includes a board (114) having one of a 3U form factor and a 9U form factor, and a central switching resource (116) coupled to the board, where the central switching resource is coupled to operate a switched fabric (106) on a backplane (104), where the switched fabric operates coincident with at least one of a VMEbus network and a PCI network on the backplane.
    Type: Grant
    Filed: September 23, 2004
    Date of Patent: December 26, 2006
    Assignee: Motorola, Inc.
    Inventors: Robert C. Tufford, Jeffrey M. Harris, Douglas L. Sandy
  • Patent number: 7155547
    Abstract: A multi-service platform system (100) includes a monolithic backplane (104), a slot (108) coupled to the monolithic backplane, wherein the slot is coupled to receive a payload module (102), and a backplane data device (106) integrally embedded in the monolithic backplane, wherein the backplane data device comprises backplane system data (424) for communication to the payload module when the payload module is coupled to the monolithic backplane.
    Type: Grant
    Filed: July 2, 2004
    Date of Patent: December 26, 2006
    Assignee: Motorola, Inc.
    Inventors: Sarah M. Wolfe, Jeffrey M. Harris, Malcolm J. Rush
  • Patent number: 7152126
    Abstract: A stacked 3U payload module unit (207) includes a base module (220), where the base module has a 3U form factor (229), and where the base module is coupled to directly communicate with a switched fabric (106) on a backplane (104) of a computer chassis (112), where the backplane comprises the switched fabric and a VMEbus network (108) operating concurrently. Stacked 3U payload module unit (207) can also include a stacking module (222) coupled to the base module, wherein the stacking module has the 3U form factor, wherein the stacking module is communicatively coupled to the base module through a stacking switched fabric connector (209), and wherein the stacking module is communicatively coupled to the switched fabric via the base module and the stacking switched fabric connector.
    Type: Grant
    Filed: August 12, 2004
    Date of Patent: December 19, 2006
    Assignee: Motorola, Inc.
    Inventors: Douglas L. Sandy, Jeffrey M. Harris, Robert C. Tufford
  • Patent number: 7120725
    Abstract: A method of communicating a VMEbus transfer (235) from an initiator VMEbus domain (202) over an IP packet network (210) to a responder VMEbus domain (204) can include the initiator VMEbus domain creating the VMEbus transfer and reading a VMEbus destination address (452) of the VMEbus transfer. The VMEbus destination address can be mapped to a responder VMEbus domain IP address and the VMEbus transfer encapsulated in an IP packet (236). The IP packet can be communicated to the responder VMEbus domain over the IP packet network.
    Type: Grant
    Filed: November 23, 2004
    Date of Patent: October 10, 2006
    Assignee: Motorola, Inc.
    Inventors: Douglas L. Sandy, Jeffrey M. Harris, Robert C. Tufford
  • Patent number: 7073009
    Abstract: A multi-service platform system (100) having a VXS backplane (104) includes a VXS payload module (102) coupled to the VXS backplane, and a switched fabric enabled mezzanine card (112) coupled to the VXS payload module, wherein the switched fabric enabled mezzanine card is coupled to directly communicate with the VXS backplane.
    Type: Grant
    Filed: May 5, 2004
    Date of Patent: July 4, 2006
    Assignee: Motorola, Inc.
    Inventors: Jeffrey M. Harris, Robert C. Tufford