Abstract: A high-speed differential-feedback cascode sense amplifier includes an output stage and a voltage clamp. The voltage clamp is coupled to a pair of bit-sense lines of a memory system or other sense line source. The output stage is coupled to the output of the voltage clamp for generating an output signal having a logic state determined according to the current difference across the bit-sense lines. The voltage clamp includes a pair of transistors (e.g., cascode transistors) in cascode to a differential-feedback gain stage. Bit-sense lines are coupled to the cascode transistors and the differential-feedback gain stage. The gain stage amplifies the current difference across the bit-sense lines to define feedback voltage signals input to the cascode transistors. The parasitic voltage difference across the bit-sense lines resulting from driving the cascode transistors is small, approximately 3-7 mV for an ECL sense amplifier.