Patents by Inventor Jeffrey M. Klemovage

Jeffrey M. Klemovage has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method for electrical interconnection between printed wiring board layers using through holes with solid core conductive material
    Patent number: 8601683
    Abstract: The present invention provides method of manufacture for a printed wiring board. The printed wiring board constructed according to the teachings of the present invention includes a printed wiring board dielectric layer having conductive foils located on at least two sides thereof. The printed wiring board further includes a solid core conductive material interconnecting the conductive foils.
    Type: Grant
    Filed: April 19, 2006
    Date of Patent: December 10, 2013
    Assignee: Agere Systems LLC
    Inventors: Charles Cohn, Jeffrey M Klemovage
  • Method of generating a leadframe IC package model, a leadframe modeler and an IC design system
    Patent number: 8370777
    Abstract: A method of generating a model of a leadframe IC package, a leadframe modeler and an IC design system are disclosed. In one embodiment the method includes: (1) adding connectivity information to a geometric representation of a leadframe, wherein the connectivity information represents electrical connections between the IC die and leads of the leadframe and (2) formatting the leads to represent BGA point of contacts for the IC die.
    Type: Grant
    Filed: June 16, 2009
    Date of Patent: February 5, 2013
    Assignee: LSI Corporation
    Inventors: Donald E. Hawk, Jr., Stephen M. King, Jeffrey M. Klemovage, John J. Krantz, Allen S. Lim, Ashley Rebelo, Richard J. Sergi
  • METHOD OF GENERATING A LEADFRAME IC PACKAGE MODEL, A LEADFRAME MODELER AND AN IC DESIGN SYSTEM
    Publication number: 20100318340
    Abstract: A method of generating a model of a leadframe IC package, a leadframe modeler and an IC design system are disclosed. In one embodiment the method includes: (1) adding connectivity information to a geometric representation of a leadframe, wherein the connectivity information represents electrical connections between the IC die and leads of the leadframe and (2) formatting the leads to represent BGA point of contacts for the IC die.
    Type: Application
    Filed: June 16, 2009
    Publication date: December 16, 2010
    Applicant: LSI Corporation
    Inventors: Donald E. Hawk, JR., Stephen M. King, Jeffrey M. Klemovage, John J. Krantz, Allen S. Lim, Ashley Rebelo, Richard J. Sergi