Patents by Inventor Jeffrey M. Petsinger

Jeffrey M. Petsinger has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080160851
    Abstract: A textile may include conductive matter and a high impedance surface defined at least in part by the conductive matter.
    Type: Application
    Filed: December 27, 2006
    Publication date: July 3, 2008
    Applicant: Motorola, Inc.
    Inventors: Gregory J. Dunn, Remy J. Chelini, Howard W. Davis, Jeffrey M. Petsinger, John A. Svigelj
  • Patent number: 7390978
    Abstract: An overmolded electronic assembly (900, 1000, 1200) is fabricated from one or more overmoldable interface components (300, 400, 500, 1220, 1750) that may be electrical contacts or electronic components that have physical interfaces, such as speakers or sensors. The overmoldable interface components have a sacrificial end that is cut off from the remainder of the overmoldable interface components after being overmolded in an electronic assembly, providing a sealed cavity into the overmolded electronic assembly.
    Type: Grant
    Filed: December 23, 2004
    Date of Patent: June 24, 2008
    Assignee: Motorola, Inc.
    Inventors: Timothy B. Dean, Daniel T. Rooney, Jeffrey M. Petsinger
  • Patent number: 7079373
    Abstract: A dielectric sheet (500, 600, 1621) includes a photodielectric support layer (505, 1630) that may be glass reinforced and a dielectric laminate (510, 605). The dielectric laminate includes first and second metal foil layers (415, 660; 210, 665, 1605, 1610), and a dielectric layer (405, 655, 1620) disposed between the first and second metal foil layers. The first metal foil layer is adhered to the photodielectric support layer. In a printed circuit and patch antenna that includes the dielectric sheet, the first metal layer is patterned by removal of metal according to a circuit pattern and the photodielectric support layer is patterned by removal of dielectric material according to the circuit pattern.
    Type: Grant
    Filed: April 30, 2004
    Date of Patent: July 18, 2006
    Assignee: Motorola, Inc.
    Inventors: Gregory J. Dunn, Jeffrey M. Petsinger, Jovica Savic
  • Patent number: 7030815
    Abstract: An integrated patch antenna and electronics assembly (300) comprises an antenna dielectric layer (305), a ground plane layer (310) disposed on a first side of the antenna dielectric layer, a printed circuit dielectric layer (315) disposed on the ground plane layer opposite the antenna dielectric layer, a patterned conductive metal foil layer (320) on a component surface (323) of the assembly (300), and a conductive metal foil antenna patch (325) disposed on a second side of the antenna dielectric layer that is in a patch side (391) of the assembly. In some embodiments, a plated through hole (330) couples the antenna patch to the patterned conductive metal foil layer. In some embodiments, there are one or more printed circuit dielectric layers (316, 341, 346, 351) disposed over the antenna patch on the antenna patch side of the assembly. In some embodiments, pairs of printed circuit dielectric layers ([315, 316], [340, 341], [345, 346], [350, 351]) are formed simultaneously on each side of the assembly.
    Type: Grant
    Filed: September 8, 2004
    Date of Patent: April 18, 2006
    Assignee: Motorola, Inc.
    Inventors: Gregory J. Dunn, Jeffrey M. Petsinger, William R. Ziemer
  • Patent number: 5825633
    Abstract: A multi-board electronic assembly (10) includes a first substrate (12) and a second substrate (14) electrically connected by a spacer (16). The spacer (16) includes a first end (26) that is received in a first receptacle (18) on the first substrate (12) and a second end (28) that is received in a second receptacle (22) in the second substrate (14). The spacer (16) is formed generally of a nonconductive body (15) and includes ridges (60) and longitudinal channels (30) defined between the ridges (60). The ridges (60) are formed generally of a nonconductive material, and the spacer (16) includes a metallic strip (32) disposed within the channel (30). The metallic strip (32) forms a conductive path to connect the first circuit trace (20) to the second circuit trace (24) to form an electrically connected microelectronic assembly (10).
    Type: Grant
    Filed: November 5, 1996
    Date of Patent: October 20, 1998
    Assignee: Motorola, Inc.
    Inventors: C. Gregory Bujalski, Jeffrey M. Petsinger, Daniel T. Rooney