Patents by Inventor Jeffrey P. Grossman

Jeffrey P. Grossman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7107430
    Abstract: Short-quasi-unique-identifiers (SQUIDs) are generated and assigned to the data objects stored in memory. Pointers to a particular data object contain the data object's assigned SQUID. If a data object is moved to a second allocated memory segment, a new pointer to the second allocated memory segment is placed at the original memory segment, so that any pointers to the original memory segment now point to the new pointer. The distribution of SQUIDs is uniform. SQUIDs can be generated by counting, generated randomly, generating through some hashing mechanism, or other means. In comparing two different pointers, it is determined that the two pointers do not reference the same data object if the SQUIDs are different. On the other hand, if the SQUIDs are identical and the address fields of the two pointers are identical, then the two pointers reference the same data object.
    Type: Grant
    Filed: November 14, 2001
    Date of Patent: September 12, 2006
    Assignee: Massachusetts Institute of Technology
    Inventors: Jeffrey P. Grossman, Thomas F. Knight, Jr., Jeremy H. Brown, Andrew W Huang
  • Patent number: 6826672
    Abstract: A pointer representation includes a permission field to define capabilities of the system in processing the data to which an address in the pointer of representation points. Bounds of the memory segment to which the capabilities apply are defined by a block field, which defines a block size, and a length field, which defines a number of blocks of that size within the segment of memory. To permit computation of the full range of addresses to which the capability applies, a finger field is included to denote the block of the segment of memory to which the address points. An increment-only bit may cause the system to preclude any negative offsets from the address in the pointer representation. Subsegments within a segment may be further defined by additional block, length and finger fields.
    Type: Grant
    Filed: May 15, 2001
    Date of Patent: November 30, 2004
    Assignee: Massachusetts Institute of Technology
    Inventors: Jeremy H. Brown, Thomas F. Knight, Jr., Jeffrey P. Grossman, Andrew W. Huang
  • Publication number: 20030005256
    Abstract: Short-quasi-unique-identifiers (SQUIDs) are generated and assigned to the data objects stored in memory. Pointers to a particular data object contain the data object's assigned SQUID. If a data object is moved to a second allocated memory segment, a new pointer to the second allocated memory segment is placed at the original memory segment, so that any pointers to the original memory segment now point to the new pointer. The distribution of SQUIDs is uniform. SQUIDs can be generated by counting, generated randomly, generating through some hashing mechanism, or other means. In comparing two different pointers, it is determined that the two pointers do not reference the same data object if the SQUIDs are different. On the other hand, if the SQUIDs are identical and the address fields of the two pointers are identical, then the two pointers reference the same data object.
    Type: Application
    Filed: November 14, 2001
    Publication date: January 2, 2003
    Inventors: Jeffrey P. Grossman, Thomas F. Knight, Jeremy H. Brown, Andrew S. Huang
  • Patent number: 6192384
    Abstract: A processor particularly useful in multimedia applications such as image processing is based on a stream programming model and has a tiered storage architecture to minimize global bandwidth requirements. The processor has a stream register file through which the processor's functional units transfer streams to execute processor operations. Load and store instructions transfer streams between the stream register file and a stream memory; send and receive instructions transfer streams between stream register files of different processors; and operate instructions pass streams between the stream register file and computational kernels. Each of the computational kernels is capable of performing compound vector operations. A compound vector operation performs a sequence of arithmetic operations on data read from the stream register file, i.e., a global storage resource, and generates a result that is written back to the stream register file.
    Type: Grant
    Filed: September 14, 1998
    Date of Patent: February 20, 2001
    Assignees: The Board of Trustees of the Leland Stanford Junior University, The Massachusetts Institute of Technology
    Inventors: William J. Dally, Scott Whitney Rixner, Jeffrey P. Grossman, Christopher James Buehler