Patents by Inventor Jeffrey R. Wilcox

Jeffrey R. Wilcox has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030061458
    Abstract: One or more memory requests are stored in a request buffer. Each memory request targets a memory device in a memory system having one or more memory devices. Each memory device has a first power state and a second power state. Each memory request is issued in an order from the request buffer to the memory system. The memory device targeted by one memory request from the request buffer is identified prior to or while another memory request ahead of the one memory request is issued to the memory system and performed by the memory system. The identified memory device is placed or maintained in the second power state prior to issuing the one memory request to the memory system.
    Type: Application
    Filed: September 25, 2001
    Publication date: March 27, 2003
    Inventors: Jeffrey R. Wilcox, Opher D. Kahn
  • Patent number: 6529442
    Abstract: A memory controller and method for a memory device avoids returning the state of address and/or preselected control lines to idle when the chip select signal is de-asserted. The preselected control signals are selected from the control signals sent to the memory device that are ignored by the memory device when the chip select signal is de-asserted. By not returning to idle, power dissipation caused by toggling of signal lines is reduced.
    Type: Grant
    Filed: January 8, 2002
    Date of Patent: March 4, 2003
    Assignee: Intel Corporation
    Inventor: Jeffrey R. Wilcox
  • Patent number: 6510099
    Abstract: It is determined whether one or more memory devices coupled with each output of one or more output buffers by a terminated bus are in a first power state or a second power state. Each output buffer has a first impedance state and a second impedance state. The one or more output buffers are placed or maintained in the first impedance state in response to determining each of the one or more memory devices is in the first power state.
    Type: Grant
    Filed: September 28, 2001
    Date of Patent: January 21, 2003
    Assignee: Intel Corporation
    Inventors: Jeffrey R. Wilcox, Opher D. Kahn
  • Patent number: 6330639
    Abstract: The present invention provides a method, apparatus, and system for dynamically changing the sizes of power-control pools that are used to control the power consumption levels of memory devices. In one embodiment, a request to change the sizes of the memory power-control pools is received. In response to receiving the request to change the sizes of the memory power-control pools, the memory devices are placed in a specific operating mode or power state after being refreshed in a periodic refresh cycle. In response to a signal indicating that all memory devices have been placed in the specific operating mode, powercontrol pools are resized according to pool size values corresponding to the request received.
    Type: Grant
    Filed: June 29, 1999
    Date of Patent: December 11, 2001
    Assignee: Intel Corporation
    Inventors: Blaise B. Fanning, Jeffrey R. Wilcox, Khong S. Foo