Patents by Inventor Jehan-Philippe Barbiero

Jehan-Philippe Barbiero has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7673121
    Abstract: A method for the transmission of digital messages by the output terminals of a monitoring circuit which is integrated into a microprocessor, the digital messages being representative of first specific events which are dependent on the execution of a series of instructions by the microprocessor.
    Type: Grant
    Filed: November 14, 2002
    Date of Patent: March 2, 2010
    Assignee: STMicroelectronics S.A.
    Inventors: Catherine Robert, Xavier Robert, Jehan-Philippe Barbiero
  • Publication number: 20060212684
    Abstract: The invention relates to a method for the transmission of digital messages by means of the output terminals (22) of a monitoring circuit (18) which is integrated into a microprocessor (12), said digital messages being representative of first specific events which are dependent on the execution of a series of instructions by the microprocessor.
    Type: Application
    Filed: November 14, 2002
    Publication date: September 21, 2006
    Applicant: STMicroelectronis S.A.
    Inventors: Catherine Robert, Xavier Robert, Jehan-Philippe Barbiero
  • Publication number: 20060155971
    Abstract: The invention relates to a method for the transmission of digital messages by a monitoring circuit (18) which is integrated into a microprocessor (12), said method being performed during the execution of a series of instructions by the microprocessor. Moreover, at least one of said digital messages represents the detection of a jump in the execution of the series of instructions from a source instruction to a destination instruction. The inventive method consists in determining whether or not the jump is associated with a jump instruction from the series of instructions for which the address of the jump destination instruction is explicitly indicated in the instruction. If the answer is in the affirmative, a first value is allocated to a first set of bits or, if the answer is in the negative, a second value is allocated to the first set of bits.
    Type: Application
    Filed: November 14, 2002
    Publication date: July 13, 2006
    Applicant: STMicroelectronics S.A.
    Inventors: Catherine Robert, Xavier Robert, Jehan-Philippe Barbiero