Patents by Inventor Jei-hwan Yeu

Jei-hwan Yeu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Boosting clamping circuit and output buffer circuit using the same
    Patent number: 5268600
    Abstract: A boosting-clamping circuit for initially outputting a boosted voltage level, and lowering and clamping the output voltage level to a predetermined level as time elapses, and an output buffer circuit using the same, includes a boosting circuit for receiving a signal to boost and outputting the signal into a high input impedance device and a clamping circuit having one node connected to the output terminal of the boosting circuit and the other node connected to ground, for lowering and clamping the output voltage level of the boosting circuit to a predetermined level as time elapses. The output buffer circuit using the boosting-clamping circuit has a fast response time and a proper output voltage level when outputting a data bit "1," thereby reducing the ground noise during outputting data "0" and improving the response speed of data "0".
    Type: Grant
    Filed: April 30, 1992
    Date of Patent: December 7, 1993
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Jei-hwan Yeu