Abstract: A semiconductor package device includes a circuit layer having a top surface, a first electronic component disposed on the top surface of the circuit layer, and a first conductive element disposed on the top surface of the circuit layer, the first conductive element having a top surface. The first electronic component has an active surface and a back surface facing the top surface of the circuit layer. A distance between the active surface of the first electronic component and the top surface of the circuit layer is greater than a distance between the top surface of the first conductive element and the top surface of the circuit layer.

Abstract: A substrate panel structure includes a plurality of sub-panels and a dielectric portion. Each of the sub-panels includes a plurality of substrate units. The dielectric portion is disposed between the sub-panels.

Abstract: A semiconductor device package includes an electronic component, a first set of conductive wires electrically connected to the electronic component, and an insulation layer surrounding the first set of conductive wires. The insulation layer exposes a portion of the first set of the conductive wires. The insulation layer is devoid of a filler.

Abstract: A semiconductor device package includes an electronic component, a first substrate, a first bonding wire and a second substrate. The electronic component has a first surface. The first substrate is disposed on the first surface of the electronic component. The first bonding wire electrically connects the first substrate to the electronic component. The second substrate is disposed on the first surface of the electronic component. The second substrate defines an opening accommodating the first substrate and the first bonding wire.

Abstract: A semiconductor package device comprises an electronic component, a conductive bump and a first conductive layer. The electronic component has a top surface. The conductive bump is disposed on the top surface of the electronic component. The conductive bump includes a main body and a protruding portion. The first conductive layer covers a portion of the protruding portion. The first conductive layer has a first upper surface and a second upper surface. The first upper surface and the second upper surface are not coplanar.

Abstract: A substrate panel structure includes a plurality of sub-panels and a dielectric portion. Each of the sub-panels includes a plurality of substrate units. The dielectric portion is disposed between the sub-panels.

Abstract: A package device includes a circuit layer, at least one conductive segment, an encapsulant and a redistribution layer. The conductive segment is disposed on the circuit layer and has a first surface and a second surface. The encapsulant encapsulates at least a portion of the conductive segment and has a first upper surface. A first portion of the first surface and at least a portion of the second surface of the conductive segment are disposed above the first upper surface of the encapsulant. The redistribution layer is disposed on the encapsulant, the first portion of the first surface of the conductive segment, and the second surface of the conductive segment.

Abstract: A connection structure is provided. The connection structure includes an intermediate conductive layer, a first conductive layer and a second conductive layer. The intermediate conductive layer includes a first surface and a second surface opposite to the first surface. The intermediate conductive layer has a first coefficient of thermal expansion. The first conductive layer is in contact with the first surface of the intermediate conductive layer. The first conductive layer has a second CTE. The second conductive layer is in contact with the second surface of the intermediate conductive layer. The first conductive layer and the second conductive layer are formed of the same material. One of the first CTE and the second CTE is negative, and the other is positive.

Abstract: A package device includes a circuit layer, at least one conductive segment, an encapsulant and a redistribution layer. The conductive segment is disposed on the circuit layer and has a first surface and a second surface. The encapsulant encapsulates at least a portion of the conductive segment and has a first upper surface. A first portion of the first surface and at least a portion of the second surface of the conductive segment are disposed above the first upper surface of the encapsulant. The redistribution layer is disposed on the encapsulant, the first portion of the first surface of the conductive segment, and the second surface of the conductive segment.

Abstract: A semiconductor device package includes an electronic component, a first substrate, a first bonding wire and a second substrate. The electronic component has a first surface. The first substrate is disposed on the first surface of the electronic component. The first bonding wire electrically connects the first substrate to the electronic component. The second substrate is disposed on the first surface of the electronic component. The second substrate defines an opening accommodating the first substrate and the first bonding wire.

Abstract: A semiconductor package device comprises a first dielectric layer, a first conductive pad and a first conductive element. The first dielectric layer has a first surface and a second surface opposite to the first surface. The first dielectric layer defines a first opening tapered from the first surface toward the second surface. The first conductive pad is within the first opening and adjacent to the second surface of the first dielectric layer. At least a portion of the first conductive element is within the first opening. The first conductive element is engaged with (e.g., abuts) a sidewall of the first opening, the first conductive element having a first surface facing toward the first conductive pad, wherein the first surface of the first conductive element is spaced apart from the first conductive pad.

Abstract: A semiconductor package device comprises an electronic component, a conductive bump and a first conductive layer. The electronic component has a top surface. The conductive bump is disposed on the top surface of the electronic component. The conductive bump includes a main body and a protruding portion. The first conductive layer covers a portion of the protruding portion. The first conductive layer has a first upper surface and a second upper surface. The first upper surface and the second upper surface are not coplanar.

Abstract: A semiconductor package device includes a carrier, a first electronic component, and a conductive element on the carrier. The first electronic component is over the carrier. The conductive element is on the carrier and electrically connects the first electronic component to the carrier. The conductive element includes at least one conductive particle and a solder material covering the conductive particle, and the conductive particle includes a metal core, a barrier layer covering the metal core, and a metal layer covering the barrier layer.

Abstract: A semiconductor package device comprises a first dielectric layer, a first conductive pad and a first conductive element. The first dielectric layer has a first surface and a second surface opposite to the first surface. The first dielectric layer defines a first opening tapered from the first surface toward the second surface. The first conductive pad is within the first opening and adjacent to the second surface of the first dielectric layer. At least a portion of the first conductive element is within the first opening. The first conductive element is engaged with (e.g., abuts) a sidewall of the first opening, the first conductive element having a first surface facing toward the first conductive pad, wherein the first surface of the first conductive element is spaced apart from the first conductive pad.

Abstract: A semiconductor package device includes a circuit layer having a top surface, a first electronic component disposed on the top surface of the circuit layer, and a first conductive element disposed on the top surface of the circuit layer, the first conductive element having a top surface. The first electronic component has an active surface and a back surface facing the top surface of the circuit layer. A distance between the active surface of the first electronic component and the top surface of the circuit layer is greater than a distance between the top surface of the first conductive element and the top surface of the circuit layer.

Abstract: A semiconductor device package includes an electronic component, a first set of conductive wires electrically connected to the electronic component, and an insulation layer surrounding the first set of conductive wires. The insulation layer exposes a portion of the first set of the conductive wires. The insulation layer is devoid of a filler.

Abstract: A semiconductor package device includes a carrier, a first electronic component, and a conductive element on the carrier. The first electronic component is over the carrier. The conductive element is on the carrier and electrically connects the first electronic component to the carrier. The conductive element includes at least one conductive particle and a solder material covering the conductive particle, and the conductive particle includes a metal core, a barrier layer covering the metal core, and a metal layer covering the barrier layer.

Abstract: The present disclosure relates to a semiconductor package structure, including a die and a package substrate. The die includes a semiconductor substrate, multiple interconnect metal layers, and at least one inter-level dielectric disposed between ones of the interconnect metal layers. Each inter-level dielectric is formed of a low k material. An outermost interconnect metal layer has multiple first conductive segments exposed from a surface of the inter-level dielectric. The package substrate includes a substrate body and multiple second conductive segments exposed from a surface of the substrate body. The second conductive segments are electrically connected to the first conductive segments.

Abstract: The present disclosure relates to a semiconductor package structure, including a die and a package substrate. The die includes a semiconductor substrate, multiple interconnect metal layers, and at least one inter-level dielectric disposed between ones of the interconnect metal layers. Each inter-level dielectric is formed of a low k material. An outermost interconnect metal layer has multiple first conductive segments exposed from a surface of the inter-level dielectric. The package substrate includes a substrate body and multiple second conductive segments exposed from a surface of the substrate body. The second conductive segments are electrically connected to the first conductive segments.

Abstract: A method of forming pre-solders on a substrate is provided. Firstly, a substrate is provided. The substrate includes an upper surface and a lower surface. There are several metal circuits and a solder mask both on the upper and the lower surfaces. Each solder mask covers parts of the corresponding metal circuits and parts of the corresponding surface for exposing parts of several pads of the corresponding metal circuits. Then, a patterned photo-resist film is formed on the upper surface. The patterned photo-resist film has several openings for exposing the upper-surface pads. Afterwards, several metal materials are formed in the opening by printing. Thereon, the metal materials are reflown to form several pre-solders on the upper-surface pads. Finally, the patterned photo-resist film is removed.