Patents by Inventor Jen-Yang LIU

Jen-Yang LIU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method of reducing memory effect of power amplifier
    Patent number: 11082013
    Abstract: A method of reducing memory effect of a power amplifier (PA), for a look-up table (LUT) based memory digital pre-distortion (DPD) circuit of an electronic device is disclosed. The method comprises generating a pre-distorted signal according to a LUT including parameters of an input signal amplitude and an input signal delay associated with a bandwidth of a signal inputted to the memory DPD circuit, and outputting the pre-distorted signal to the PA for improving the nonlinearity of the PA.
    Type: Grant
    Filed: May 10, 2018
    Date of Patent: August 3, 2021
    Assignee: MEDIATEK INC.
    Inventors: Ching-Shyang Maa, Chun-Hsien Peng, Hua-Lung Yang, I-No Liao, Chen-Jui Hsu, Jen-Yang Liu
  • Method of reducing memory effect of power amplifier
    Publication number: 20180331662
    Abstract: A method of reducing memory effect of a power amplifier (PA), for a look-up table (LUT) based memory digital pre-distortion (DPD) circuit of an electronic device is disclosed. The method comprises generating a pre-distorted signal according to a LUT including parameters of an input signal amplitude and an input signal delay associated with a bandwidth of a signal inputted to the memory DPD circuit, and outputting the pre-distorted signal to the PA for improving the nonlinearity of the PA.
    Type: Application
    Filed: May 10, 2018
    Publication date: November 15, 2018
    Inventors: Ching-Shyang Maa, Chun-Hsien Peng, Hua-Lung Yang, I-No Liao, Chen-Jui Hsu, Jen-Yang Liu
  • Low-cost test/calibration system and calibrated device for low-cost test/calibration system
    Patent number: 9525500
    Abstract: A test/calibration system includes a device under test (DUT) and a calibrated device. The calibrated device is coupled to the DUT, transmits or receives a test signal to or from the DUT in response to a control signal for a test item to test, measure or calibrate functioning or performance of an internal component of the DUT.
    Type: Grant
    Filed: November 30, 2015
    Date of Patent: December 20, 2016
    Assignee: MEDIATEK INC.
    Inventors: Jen-Yang Liu, I-Cheng Tsai, Hsueh-Wei Chiu, Yuan-Hwui Chung, Chun-Hsien Peng
  • LOW-COST TEST/CALIBRATION SYSTEM AND CALIBRATED DEVICE FOR LOW-COST TEST/CALIBRATION SYSTEM
    Publication number: 20160112148
    Abstract: A test/calibration system includes a device under test (DUT) and a calibrated device. The calibrated device is coupled to the DUT, transmits or receives a test signal to or from the DUT in response to a control signal for a test item to test, measure or calibrate functioning or performance of an internal component of the DUT.
    Type: Application
    Filed: November 30, 2015
    Publication date: April 21, 2016
    Inventors: Jen-Yang LIU, I-Cheng TSAI, Hsueh-Wei CHIU, Yuan-Hwui CHUNG, Chun-Hsien PENG