Patents by Inventor Jennifer Lequn Liu

Jennifer Lequn Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9076680
    Abstract: A method of forming capacitors includes providing a support material over a substrate. The support material is at least one of semiconductive or conductive. Openings are formed into the support material. The openings include at least one of semiconductive or conductive sidewalls. An insulator is deposited along the semiconductive and/or conductive opening sidewalls. A pair of capacitor electrodes having capacitor dielectric there-between is formed within the respective openings laterally inward of the deposited insulator. One of the pair of capacitor electrodes within the respective openings is laterally adjacent the deposited insulator. Other aspects are disclosed, including integrated circuitry independent of method of manufacture.
    Type: Grant
    Filed: October 18, 2011
    Date of Patent: July 7, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Brett W. Busch, Mingtao Li, Jennifer Lequn Liu, Kevin R. Shea, Belford T. Coursey, Jonathan T. Doebler
  • Publication number: 20130093050
    Abstract: A method of forming capacitors includes providing a support material over a substrate. The support material is at least one of semiconductive or conductive. Openings are formed into the support material. The openings include at least one of semiconductive or conductive sidewalls. An insulator is deposited along the semiconductive and/or conductive opening sidewalls. A pair of capacitor electrodes having capacitor dielectric there-between is formed within the respective openings laterally inward of the deposited insulator. One of the pair of capacitor electrodes within the respective openings is laterally adjacent the deposited insulator. Other aspects are disclosed, including integrated circuitry independent of method of manufacture.
    Type: Application
    Filed: October 18, 2011
    Publication date: April 18, 2013
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Brett W. Busch, Mingtao Li, Jennifer Lequn Liu, Kevin R. Shea, Belford T. Coursey, Jonathan T. Doebler
  • Patent number: 8329567
    Abstract: Some embodiments include methods of forming one or more doped regions in a semiconductor substrate. Plasma doping may be used to form a first dopant to a first depth within the substrate. The first dopant may then be impacted with a second dopant to knock the first dopant to a second depth within the substrate. In some embodiments the first dopant is p-type (such as boron) and the second dopant is neutral type (such as germanium). In some embodiments the second dopant is heavier than the first dopant.
    Type: Grant
    Filed: November 3, 2010
    Date of Patent: December 11, 2012
    Assignee: Micron Technology, Inc.
    Inventors: Jennifer Lequn Liu, Shu Qin, Allen McTeer, Yongjun Jeff Hu
  • Patent number: 8173507
    Abstract: Methods include forming a charge storage transistor gate stack over semiconductive material. One such stack includes a tunnel dielectric, charge storage material over the tunnel dielectric, a high-k dielectric over the charge storage material, and conductive control gate material over the high-k dielectric. The stack is etched at least to the tunnel dielectric to form a plurality of charge storage transistor gate lines over the semiconductive material. Individual of the gate lines have laterally projecting feet which include the high-k dielectric. After etching the stack to form the gate lines, ions are implanted into an implant region which includes the high-k dielectric of the laterally projecting feet. The ions are chemically inert to the high-k dielectric. The ion implanted high-k dielectric of the projecting feet is etched selectively relative to portions of the high-k dielectric outside of the implant region.
    Type: Grant
    Filed: June 22, 2010
    Date of Patent: May 8, 2012
    Assignee: Micron Technology, Inc.
    Inventors: Chan Lim, Jennifer Lequn Liu, Brian Dolan, Saurabh Keshav, Hongbin Zhu
  • Publication number: 20120108042
    Abstract: Some embodiments include methods of forming one or more doped regions in a semiconductor substrate. Plasma doping may be used to form a first dopant to a first depth within the substrate. The first dopant may then be impacted with a second dopant to knock the first dopant to a second depth within the substrate. In some embodiments the first dopant is p-type (such as boron) and the second dopant is neutral type (such as germanium). In some embodiments the second dopant is heavier than the first dopant.
    Type: Application
    Filed: November 3, 2010
    Publication date: May 3, 2012
    Inventors: Jennifer Lequn Liu, Shu Qin, Allen McTeer, Yongjun Jeff Hu
  • Publication number: 20110312171
    Abstract: Methods include forming a charge storage transistor gate stack over semiconductive material. One such stack includes a tunnel dielectric, charge storage material over the tunnel dielectric, a high-k dielectric over the charge storage material, and conductive control gate material over the high-k dielectric. The stack is etched at least to the tunnel dielectric to form a plurality of charge storage transistor gate lines over the semiconductive material. Individual of the gate lines have laterally projecting feet which include the high-k dielectric. After etching the stack to form the gate lines, ions are implanted into an implant region which includes the high-k dielectric of the laterally projecting feet. The ions are chemically inert to the high-k dielectric. The ion implanted high-k dielectric of the projecting feet is etched selectively relative to portions of the high-k dielectric outside of the implant region.
    Type: Application
    Filed: June 22, 2010
    Publication date: December 22, 2011
    Inventors: Chan Lim, Jennifer Lequn Liu, Brian Dolan, Saurabh Keshav, Hongbin Zhu