Patents by Inventor Jens-Peer Stengl

Jens-Peer Stengl has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9431379
    Abstract: A signal transmission arrangement is disclosed. A voltage converter includes a signal transmission arrangement.
    Type: Grant
    Filed: January 22, 2015
    Date of Patent: August 30, 2016
    Assignee: Infineon Technologies Austria AG
    Inventors: Martin Kerber, Jens-Peer Stengl, Uwe Wahl
  • Publication number: 20150132890
    Abstract: A signal transmission arrangement is disclosed. A voltage converter includes a signal transmission arrangement.
    Type: Application
    Filed: January 22, 2015
    Publication date: May 14, 2015
    Inventors: Martin Kerber, Jens-Peer Stengl, Uwe Wahl
  • Patent number: 8970000
    Abstract: A signal transmission arrangement is disclosed. A voltage converter includes a signal transmission arrangement.
    Type: Grant
    Filed: January 18, 2010
    Date of Patent: March 3, 2015
    Assignee: Infineon Technologies Austria AG
    Inventors: Martin Kerber, Jens-Peer Stengl, Uwe Wahl
  • Patent number: 8790985
    Abstract: The disclosed invention provides a structure and method for providing a high lateral voltage resistance between the electrical networks, sharing a lateral plane, of conductive elements (e.g., having different high voltage potentials) comprising a coupler. In one embodiment, an integrated coupler providing a high lateral voltage resistance comprises a primary conductive element and a secondary conductive element. An isolating material is laterally configured between the electrical network of the primary conductive element and an electrical network of the secondary conductive element. The isolating material may comprise a low-k dielectric layer and prevents any lateral barrier layers (e.g., etch stop layers, diffusion barrier layers, etc.) from extending between the first conductive element and the electrical network of the second conductive element. The structure therefore provides a galvanically isolated integrated coupler which avoids electrical shorting between circuits (e.g.
    Type: Grant
    Filed: June 29, 2012
    Date of Patent: July 29, 2014
    Assignee: Infineon Technologies Austria AG
    Inventors: Uwe Wahl, Markus Hammer, Jens-Peer Stengl
  • Patent number: 8319573
    Abstract: A signal transmission arrangement includes input terminals for receiving an input signal and output terminals for providing an output signal. A first transformer has a primary winding and a secondary winding, the primary winding being coupled to the input terminals. A second transformer has a primary winding and a secondary winding, the primary winding being coupled to the secondary winding of the first transformer, and the secondary winding being coupled to the output terminals.
    Type: Grant
    Filed: December 23, 2009
    Date of Patent: November 27, 2012
    Assignee: Infineon Technologies Austria AG
    Inventors: Peter Kanschat, Uwe Wahl, Marcus Nuebling, Jens-Peer Stengl
  • Publication number: 20120273917
    Abstract: The disclosed invention provides a structure and method for providing a high lateral voltage resistance between the electrical networks, sharing a lateral plane, of conductive elements (e.g., having different high voltage potentials) comprising a coupler. In one embodiment, an integrated coupler providing a high lateral voltage resistance comprises a primary conductive element and a secondary conductive element. An isolating material is laterally configured between the electrical network of the primary conductive element and an electrical network of the secondary conductive element. The isolating material may comprise a low-k dielectric layer and prevents any lateral barrier layers (e.g., etch stop layers, diffusion barrier layers, etc.) from extending between the first conductive element and the electrical network of the second conductive element. The structure therefore provides a galvanically isolated integrated coupler which avoids electrical shorting between circuits (e.g.
    Type: Application
    Filed: June 29, 2012
    Publication date: November 1, 2012
    Applicant: Infineon Technologies Austria AG
    Inventors: Uwe Wahl, Markus Hammer, Jens-Peer Stengl
  • Patent number: 8278730
    Abstract: The disclosed invention provides a structure and method for providing a high lateral voltage resistance between the electrical networks, sharing a lateral plane, of conductive elements (e.g., having different high voltage potentials) comprising a coupler. In one embodiment, an integrated coupler providing a high lateral voltage resistance comprises a primary conductive element and a secondary conductive element. An isolating material is laterally configured between the electrical network of the primary conductive element and an electrical network of the secondary conductive element. The isolating material may comprise a low-k dielectric layer and prevents any lateral barrier layers (e.g., etch stop layers, diffusion barrier layers, etc.) from extending between the first conductive element and the electrical network of the second conductive element. The structure therefore provides a galvanically isolated integrated coupler which avoids electrical shorting between circuits (e.g.
    Type: Grant
    Filed: October 28, 2009
    Date of Patent: October 2, 2012
    Assignee: Infineon Technologies Austria AG
    Inventors: Uwe Wahl, Markus Hammer, Jens-Peer Stengl
  • Publication number: 20110176339
    Abstract: A signal transmission arrangement is disclosed. A voltage converter includes a signal transmission arrangement.
    Type: Application
    Filed: January 18, 2010
    Publication date: July 21, 2011
    Inventors: Martin Kerber, Jens-Peer Stengl, Uwe Wahl
  • Publication number: 20110148549
    Abstract: A signal transmission arrangement includes input terminals for receiving an input signal and output terminals for providing an output signal. A first transformer has a primary winding and a secondary winding, the primary winding being coupled to the input terminals. A second transformer has a primary winding and a secondary winding, the primary winding being coupled to the secondary winding of the first transformer, and the secondary winding being coupled to the output terminals.
    Type: Application
    Filed: December 23, 2009
    Publication date: June 23, 2011
    Inventors: Peter Kanschat, Uwe Wahl, Marcus Nuebling, Jens-Peer Stengl
  • Publication number: 20110095392
    Abstract: The disclosed invention provides a structure and method for providing a high lateral voltage resistance between the electrical networks, sharing a lateral plane, of conductive elements (e.g., having different high voltage potentials) comprising a coupler. In one embodiment, an integrated coupler providing a high lateral voltage resistance comprises a primary conductive element and a secondary conductive element. An isolating material is laterally configured between the electrical network of the primary conductive element and an electrical network of the secondary conductive element. The isolating material may comprise a low-k dielectric layer and prevents any lateral barrier layers (e.g., etch stop layers, diffusion barrier layers, etc.) from extending between the first conductive element and the electrical network of the second conductive element. The structure therefore provides a galvanically isolated integrated coupler which avoids electrical shorting between circuits (e.g.
    Type: Application
    Filed: October 28, 2009
    Publication date: April 28, 2011
    Applicant: Infineon Technologies Austria AG
    Inventors: Uwe Wahl, Markus Hammer, Jens-Peer Stengl
  • Patent number: 7710215
    Abstract: A semiconductor configuration having an integrated coupler is provided. The semiconductor configuration includes a coupler which is integrated in the substrate and which includes a first port and a second port. The coupler defines, in a plan view onto the substrate, an inner region of the substrate surrounded at least in sections by the coupler, and an outer region of the substrate arranged outside to the coupler. The coupler is at least a magnetic coupler, a capacitive coupler, or a combination of both. At least a circuit element is integrated in the inner region of the substrate and includes a port which is electrically connected to the second port of the coupler.
    Type: Grant
    Filed: February 4, 2008
    Date of Patent: May 4, 2010
    Assignee: Infineon Technologies Austria AG
    Inventors: Uwe Wahl, Jens-Peer Stengl
  • Publication number: 20090195335
    Abstract: A semiconductor configuration having an integrated coupler is provided. The semiconductor configuration includes a coupler which is integrated in the substrate and which includes a first port and a second port. The coupler defines, in a plan view onto the substrate, an inner region of the substrate surrounded at least in sections by the coupler, and an outer region of the substrate arranged outside to the coupler. The coupler is at least a magnetic coupler, a capacitive coupler, or a combination of both. At least a circuit element is integrated in the inner region of the substrate and includes a port which is electrically connected to the second port of the coupler.
    Type: Application
    Filed: February 4, 2008
    Publication date: August 6, 2009
    Applicant: Infineon Technologies Austria AG
    Inventors: UWE WAHL, JENS-PEER STENGL
  • Patent number: 6870201
    Abstract: The invention relates to a high voltage resistant edge structure in the edge region of a semiconductor component which has floating guard rings of the first conductivity type and inter-ring zones of the second conductivity type which are arranged between the floating guard rings, wherein the conductivities and/or the inter-ring zones are set such that their charge carriers are totally depleted when blocking voltage is applied. The inventive edge structure achieves a modulation of the electrical field both at the surface and in the volume of the semiconductor body. If the inventive edge structure is suitably dimensioned, the field intensity maximum can easily be situated in the depth; that is, in the region of the vertical p-n junction. Thus, a suitable edge construction which permits a “soft” leakage of the electrical field in the volume can always be provided over a wide range of concentrations of p and n doping.
    Type: Grant
    Filed: November 2, 1998
    Date of Patent: March 22, 2005
    Assignee: Infineon Technologies AG
    Inventors: Gerald Deboy, Jenoe Tihanyi, Helmut Strack, Helmut Gassel, Jens-Peer Stengl, Hans Weber
  • Patent number: 6831327
    Abstract: A vertically structured semiconductor power component is described. A layer thickness of a substrate of the power module between a pn junction and a metallized back is chosen in such a manner that a space charge region produced in the semiconductor component extends as far as the back when a blocking voltage between a source and a drain electrode is applied before a field strength produced by the applied blocking voltage reaches a critical value.
    Type: Grant
    Filed: April 19, 2001
    Date of Patent: December 14, 2004
    Assignee: Infineon Technologies AG
    Inventors: Gerald Deboy, Jens-Peer Stengl, Hans Weber, Armin Willmeroth
  • Patent number: 6812524
    Abstract: A semiconductor component includes first and second connection zones formed in a semiconductor body, a channel zone surrounding the second connection zone in the semiconductor body, and a drift path that is formed between the channel zone and the first connection zone and contains a compensation zone. The compensation zone has a complementary conduction type with respect to the drift zone and includes at least two segments. A distance between the two adjacent segments is chosen such that the punch-through voltage between these segments lies in a voltage range that corresponds to the voltage range assumed by the voltage drop across the drift path at currents situated between the rated current and twice the rated current.
    Type: Grant
    Filed: December 11, 2001
    Date of Patent: November 2, 2004
    Assignee: Infineon Technologies AG
    Inventors: Dirk Ahlers, Jens-Peer Stengl, Jenoe Tihanyi, Hans Weber, Gerald Deboy, Helmut Strack, Armin Willmeroth
  • Patent number: 6465863
    Abstract: The invention relates to a power diode structure having improved dynamic characteristics which comprises a semiconductor body of a first conduction type. A semiconductor zone of the other conduction type which is contrary to the first conduction type is embedded in the one surface of said semiconductor body. The power diode also comprises an anode which contacts the semiconductor zone, and has a cathode which contacts the semiconductor body. At least one floating region of the second conduction type is provided in the semiconductor body.
    Type: Grant
    Filed: November 28, 2000
    Date of Patent: October 15, 2002
    Assignee: Infineon Technologies AG
    Inventors: Gerald Deboy, Jens-Peer Stengl
  • Publication number: 20020106996
    Abstract: The system has at least two electronic units between which signals are transferred from a first electronic unit and a second electronic unit. The first electronic unit has a signal source. The second electronic unit has a signal sink. A signal to be transferred is converted into a line-independent electromagnetic wave with a transmitting unit and transmitted to a receiving unit. The line-independent electromagnetic wave is received with the receiving unit and converted into a reception signal.
    Type: Application
    Filed: January 30, 2002
    Publication date: August 8, 2002
    Inventors: Jens-Peer Stengl, Jenoe Tihanyi, Wolfgang Werner, Karim-Thomas Taghizadeh-Kaschani
  • Publication number: 20020096708
    Abstract: A semiconductor component includes first and second connection zones formed in a semiconductor body, a channel zone surrounding the second connection zone in the semiconductor body, and a drift path that is formed between the channel zone and the first connection zone and contains a compensation zone. The compensation zone has a complementary conduction type with respect to the drift zone and includes at least two segments. A distance between the two adjacent segments is chosen such that the punch-through voltage between these segments lies in a voltage range that corresponds to the voltage range assumed by the voltage drop across the drift path at currents situated between the rated current and twice the rated current.
    Type: Application
    Filed: December 11, 2001
    Publication date: July 25, 2002
    Inventors: Dirk Ahlers, Jens-Peer Stengl, Jenoe Tihanyi, Hans Weber, Gerald Deboy, Helmut Strack, Armin Willmeroth
  • Publication number: 20020063280
    Abstract: A vertically structured semiconductor power module is described. A layer thickness of a substrate of the power module between a pn junction and a metallized back is chosen in such a manner that a space charge region produced in the semiconductor module extends as far as the back when a blocking voltage between a source and a drain electrode is applied before a field strength produced by the applied blocking voltage reaches a critical value.
    Type: Application
    Filed: April 19, 2001
    Publication date: May 30, 2002
    Inventors: Gerald Deboy, Jens-Peer Stengl, Hans Weber, Armin Willmeroth
  • Patent number: 6309974
    Abstract: Residual oxygen impurities are eliminated from silicon wafers pulled from a crucible (Czochralski silicon). A multitude of trenches are etched into the back side of the crucible-pulled silicon wafer and the wafer is subsequently heat-treated at about 1100° C. The very large surface area at the front side of the silicon wafer allows oxygen impurities to diffuse out effectively. After the diffusion has been carried out, the trenches are filled with heavily doped polysilicon without leaving gaps.
    Type: Grant
    Filed: September 17, 1998
    Date of Patent: October 30, 2001
    Assignee: Infineon Technologies AG
    Inventors: Helmut Strack, Jens-Peer Stengl