Patents by Inventor Jeon Sig Lim

Jeon Sig Lim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100258526
    Abstract: In a method of forming an ACL, a substrate is provided in a deposition chamber. A plasma deposition process is performed by providing a deposition gas into the deposition chamber to form the ACL on the substrate. The deposition gas includes a deposition source gas, a carrier gas and a control gas. The deposition source gas includes a hydrocarbon, and the control gas includes at least one of oxygen and oxycarbon.
    Type: Application
    Filed: April 5, 2010
    Publication date: October 14, 2010
    Inventors: Jaihyung Won, Jin-Hyung Park, Jeon-Sig Lim, Jae-Hyun Park, Jong-Sik Choi
  • Patent number: 7180129
    Abstract: A method of manufacturing an insulating layer that ensures reproducibility across like manufacturing apparatus. The insulating layer is formed on the substrate by (a) flowing an oxidizing gas at an oxidizing gas flow rate, (b) flowing a first carrier gas at a first carrier gas flow rate while carrying a first impurity including boron flowing at a first impurity flow rate, (c) flowing a second carrier gas at a second carrier gas flow rate while carrying a second impurity including phosphorus flowing at a second impurity flow rate, and (d) flowing a silicon source material at a silicon source flow rate. The second carrier gas flow rate is greater than the first carrier gas flow rate.
    Type: Grant
    Filed: September 30, 2003
    Date of Patent: February 20, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Woo-Chan Jung, Jin-Ho Jeon, Jeon-Sig Lim, Jong-Seung Yi
  • Publication number: 20050072991
    Abstract: A method of manufacturing an insulating layer that ensures reproducibility across like manufacturing apparatus. The insulating layer is formed on the substrate by (a) flowing an oxidizing gas at an oxidizing gas flow rate, (b) flowing a first carrier gas at a first carrier gas flow rate while carrying a first impurity including boron flowing at a first impurity flow rate, (c) flowing a second carrier gas at a second carrier gas flow rate while carrying a second impurity including phosphorus flowing at a second impurity flow rate, and (d) flowing a silicon source material at a silicon source flow rate. The second carrier gas flow rate is greater than the first carrier gas flow rate.
    Type: Application
    Filed: September 30, 2003
    Publication date: April 7, 2005
    Inventors: Woo-Chan Jung, Jin-Ho Jeon, Jeon-Sig Lim, Jong-Seung Yi
  • Patent number: 6730619
    Abstract: A method of manufacturing an insulating layer that ensures reproducibility across like manufacturing apparatus. The insulating layer is formed on the substrate by (a) flowing an oxidizing gas at an oxidizing gas flow rate, (b) flowing a first carrier gas at a first carrier gas flow rate while carrying a first impurity including boron flowing at a first impurity flow rate, (c) flowing a second carrier gas at a second carrier gas flow rate while carrying a second impurity including phosphorus flowing at a second impurity flow rate, and (d) flowing a silicon source material at a silicon source flow rate. The second carrier gas flow rate is greater than the first carrier gas flow rate.
    Type: Grant
    Filed: April 16, 2002
    Date of Patent: May 4, 2004
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Woo-Chan Jung, Jin-Ho Jeon, Jeon-Sig Lim, Jong-Seung Yi
  • Publication number: 20020130385
    Abstract: A method of manufacturing an insulating layer that ensures reproducibility across like manufacturing apparatus. The insulating layer is formed on the substrate by (a) flowing an oxidizing gas at an oxidizing gas flow rate, (b) flowing a first carrier gas at a first carrier gas flow rate while carrying a first impurity including boron flowing at a first impurity flow rate, (c) flowing a second carrier gas at a second carrier gas flow rate while carrying a second impurity including phosphorus flowing at a second impurity flow rate, and (d) flowing a silicon source material at a silicon source flow rate. The second carrier gas flow rate is greater than the first carrier gas flow rate.
    Type: Application
    Filed: April 16, 2002
    Publication date: September 19, 2002
    Inventors: Woo-Chan Jung, Jin-Ho Jeon, Jeon-Sig Lim, Jong-Seung Yi
  • Patent number: 6451694
    Abstract: In a process for mitigating and/or eliminating the abnormal growth of underlying polysilicon in dichloro silane-based CVD polycide WSix films, a first technique conducts the deposition of the underlying polysilicon layer at a temperature that substantially avoids crystallization of the underlying polysilicon. A second approach reduces the exposure (for example time period and or concentration) of the mono-silane SiH4 post flush, so as to avoid infusion of silicon into the underlying polysilicon layer, and resulting abnormal growth. In this manner, abnormal effects, such as stress fractures formed in subsequent layers, can be eliminated.
    Type: Grant
    Filed: April 4, 2001
    Date of Patent: September 17, 2002
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jeon-Sig Lim, Jin-Ho Jeon, Jong-Seung Yi, Chul-Hwan Choi
  • Publication number: 20020068467
    Abstract: A method of fabricating a PE-SiON film includes forming a PE-SiON film by turning on a high frequency radio frequency (HF RF) power in the chamber after a plurality of reaction gases SiH4, N2, NH3, N2O have simultaneously flown into a chamber without proceeding a bypass process of SiH4.
    Type: Application
    Filed: June 21, 2001
    Publication date: June 6, 2002
    Inventors: Woo-Chan Jung, Jin-Ho Jeon, Jeon-Sig Lim, Jong-Seung Yi, Kyung-Tae Kim
  • Patent number: 6376303
    Abstract: A method of manufacturing a capacitor having a high storage capacitance and a method of fabricating semiconductor devices incorporating the same include measures to ensure that the substrate and/or components of the device are not thermally damaged during the process of forming a sacrificial structure of doped oxide layers used as a form in producing the storage electrode of the capacitor. The oxide layers are formed over the substrate by LPCVD or PECVD, which processes can be carried out at a temperature of only about 400-600° C. Each one of an adjacent pair of the doped oxide layers has a different etching rate from the other as the result of a difference (type or amount) in impurities contained in the oxide layers. At least one hole is formed in the sacrificial structure to create a side wall of the sacrificial structure. The side wall is etched so that repeating tooth-like prominences and depressions are formed at the side wall as the result of the different etching rates of the oxide layers.
    Type: Grant
    Filed: February 7, 2000
    Date of Patent: April 23, 2002
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Tae Wook Seo, Jeon Sig Lim