Patents by Inventor Jeong Hwa Jeong

Jeong Hwa Jeong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10388398
    Abstract: A memory apparatus includes a memory cell array including a plurality of memory cells, a temperature sensor, a temperature compensated self refresh (TCSR) block, and a command controller. The temperature sensor is configured to generate temperature information by measuring internal temperature of the memory apparatus. The TCSR block is configured to vary and output, in a test mode of the memory apparatus, period information for adjusting a refresh period for the memory cell array according to the temperature information. The command controller is configured to adjust, in response to the period information, the refresh period for the memory cell array by controlling an external command.
    Type: Grant
    Filed: September 6, 2017
    Date of Patent: August 20, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jeong-Hwa Jeong, Jeong-Yun Cha
  • Publication number: 20180075927
    Abstract: A memory apparatus includes a memory cell array including a plurality of memory cells, a temperature sensor, a temperature compensated self refresh (TCSR) block, and a command controller. The temperature sensor is configured to generate temperature information by measuring internal temperature of the memory apparatus. The TCSR block is configured to vary and output, in a test mode of the memory apparatus, period information for adjusting a refresh period for the memory cell array according to the temperature information. The command controller is configured to adjust, in response to the period information, the refresh period for the memory cell array by controlling an external command.
    Type: Application
    Filed: September 6, 2017
    Publication date: March 15, 2018
    Inventors: Jeong-Hwa Jeong, Jeong-Yun Cha
  • Patent number: 9245651
    Abstract: A memory device includes a memory array, a plurality of input/output pins, a mask signal generator, an input/output block. The memory array is configured to output read data including a plurality of data bits. The mask signal generator is configured to generate at least one data mask signal. The input/output block is configured to mask bits having a logic level among the plurality of data bits in the read data to output the masked read data to the plurality of input/output pins.
    Type: Grant
    Filed: July 14, 2014
    Date of Patent: January 26, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jeong Yun Cha, Yun Kil Kim, Jeong Hwa Jeong
  • Publication number: 20150016200
    Abstract: A memory device includes a memory array, a plurality of input/output pins, a mask signal generator, an input/output block. The memory array is configured to output read data including a plurality of data bits. The mask signal generator is configured to generate at least one data mask signal. The input/output block is configured to mask bits having a logic level among the plurality of data bits in the read data to output the masked read data to the plurality of input/output pins.
    Type: Application
    Filed: July 14, 2014
    Publication date: January 15, 2015
    Inventors: JEONG YUN CHA, Yun Kil Kim, Jeong Hwa Jeong