Patents by Inventor Jeongjin Roh

Jeongjin Roh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230393601
    Abstract: Disclosed herein is a voltage regulator having a capacitive feed-forward ripple cancellation circuit, which includes a pass unit configured to transfer, in response to a control signal, an input voltage provided from an input terminal to an output voltage of an output terminal, an error amplification unit configured to output a comparison signal on the basis of a magnitude comparison result between the output voltage and a reference voltage, and a capacitive feed-forward ripple cancellation unit configured to remove a ripple included in the input voltage using the reference voltage and the comparison signal in order to generate the control signal. In accordance with the present invention, a circuit capable of removing power supply noise while consuming a low quiescent current through a capacitive feed-forward ripple cancellation technique can be provided.
    Type: Application
    Filed: March 29, 2023
    Publication date: December 7, 2023
    Inventors: Jeongjin ROH, Woobin KANG, Tian Guo
  • Publication number: 20230205246
    Abstract: Disclosed herein is a low dropout (LDO) voltage regulator including an amplifier configured to receive a reference voltage through a negative input terminal, receive a feedback voltage through a positive input terminal, and amplify a difference between the feedback voltage and the reference voltage; a buffer which has an input connected to an output of the amplifier and an output and performs a buffering operation; a pass transistor configured to generate a driving current according to an output signal of the buffer; a voltage divider configured to form an output signal according to the driving current and generate a feedback voltage through a feedback resistor connected thereto; and a negative resistor circuit connected between the reference voltage and the feedback resistor and configured to generate a compensation current compensating for a loss current generated in the feedback resistor.
    Type: Application
    Filed: December 28, 2022
    Publication date: June 29, 2023
    Inventors: Jeongjin ROH, Jungsik KIM, Yeonggwang BAE
  • Patent number: 11588403
    Abstract: Provided is a buck-boost converting circuit including an LED current regulator and bypass switches. The buck-boost converting circuit includes switches coupled in a matrix form in order to individually control a plurality of LEDs connected in series, an LED current regulator, and a circuit capable of buck-boost conversion.
    Type: Grant
    Filed: December 21, 2020
    Date of Patent: February 21, 2023
    Assignee: Silicon Works Co., Ltd
    Inventors: Seung Jin Kim, Jae Seong Lee, Jung Sik Kim, Jeongjin Roh, Ju Pyo Hong, Ju Hyun Lee
  • Publication number: 20210194369
    Abstract: Provided is a buck-boost converting circuit including an LED current regulator and bypass switches. The buck-boost converting circuit includes switches coupled in a matrix form in order to individually control a plurality of LEDs connected in series, an LED current regulator, and a circuit capable of buck-boost conversion.
    Type: Application
    Filed: December 21, 2020
    Publication date: June 24, 2021
    Applicant: Silicon Works Co., Ltd.
    Inventors: Seung Jin Kim, Jae Seong Lee, Jung Sik Kim, Jeongjin Roh, Ju Pyo Hong, Ju Hyun Lee
  • Patent number: 9444489
    Abstract: Provided is a delta-sigma modulator having a differential output, the modulator including a switched-capacitor integrator configured to generate a non-inverted integral signal and an inverted integral signal and also including a switched-capacitor circuit configured to sample an input signal based on a control signal and to integrate the feedback signal and the input signal based on the control signal and also a feedback circuit configured to generate the feedback signal.
    Type: Grant
    Filed: July 22, 2015
    Date of Patent: September 13, 2016
    Assignees: Samsung Electronics Co., Ltd., Industry-University Cooperation Foundation Hanyang University ERICA Campus
    Inventors: Jeongjin Roh, Jong Pal Kim, Youngjae Jung, Quanzhen Duan, Tak Hyung Lee, Danbi Choi
  • Publication number: 20160149586
    Abstract: Provided is a delta-sigma modulator having a differential output, the modulator including a switched-capacitor integrator configured to generate a non-inverted integral signal and an inverted integral signal and also including a switched-capacitor circuit configured to sample an input signal based on a control signal and to integrate the feedback signal and the input signal based on the control signal and also a feedback circuit configured to generate the feedback signal.
    Type: Application
    Filed: July 22, 2015
    Publication date: May 26, 2016
    Applicants: SAMSUNG ELECTRONICS CO., LTD., Industry-University Cooperation Foundation Hanyang University ERICA Campus
    Inventors: Jeongjin ROH, Jong Pal KIM, Youngjae JUNG, Quanzhen DUAN, Tak Hyung LEE, Danbi CHOI
  • Patent number: 6590512
    Abstract: An analog to digital converter may achieve an output sampling rate that is not an integer multiple of the system clock. This may be done without using the conventional phase-locked loop circuit that generally requires a longer design time, more testing, and more silicon area. A pseudo clock may be generated from the system clock in which some of the system clock pulses are disabled to achieve a pseudo clock with the desired effective frequency.
    Type: Grant
    Filed: April 23, 2001
    Date of Patent: July 8, 2003
    Assignee: Intel Corporation
    Inventors: Jeongjin Roh, Vijayakumaran V. Nair, Jiang Chen, Rose W. Wang
  • Publication number: 20030020443
    Abstract: A bandgap reference circuit includes at least one transistor, an amplifier and a start-up circuit. The amplifier is coupled to the transistor(s) to establish a bandgap reference voltage. The start-up circuit, in response to the bandgap reference circuit powering up, isolates an output terminal of the amplifier from at least one input terminal of the amplifier and supplies power to the transistor(s) via the output terminal.
    Type: Application
    Filed: July 30, 2001
    Publication date: January 30, 2003
    Inventor: Jeongjin Roh
  • Patent number: 6509726
    Abstract: A bandgap reference circuit includes at least one transistor, an amplifier and a start-up circuit. The amplifier is coupled to the transistor(s) to establish a bandgap reference voltage. The start-up circuit, in response to the bandgap reference circuit powering up, isolates an output terminal of the amplifier from at least one input terminal of the amplifier and supplies power to the transistor(s) via the output terminal.
    Type: Grant
    Filed: July 30, 2001
    Date of Patent: January 21, 2003
    Assignee: Intel Corporation
    Inventor: Jeongjin Roh
  • Publication number: 20020154047
    Abstract: An analog to digital converter may achieve an output sampling rate that is not an integer multiple of the system clock. This may be done without using the conventional phase-locked loop circuit that generally requires a longer design time, more testing, and more silicon area. A pseudo clock may be generated from the system clock in which some of the system clock pulses are disabled to achieve a pseudo clock with the desired effective frequency.
    Type: Application
    Filed: April 23, 2001
    Publication date: October 24, 2002
    Inventors: Jeongjin Roh, Vijayakumaran V. Nair, Jiang Chen, Rose W. Wang
  • Patent number: 6462612
    Abstract: A bandgap reference circuit utilizes chopper stabilization to reduce reference voltage variation caused by, for example, offset voltage and 1/f noise within an associated amplifier. The input signal of the amplifier is modulated using a high frequency modulation signal. The modulated signal is then amplified and demodulated. In one embodiment, a single-ended chopper amplifier having integrated amplification/demodulation functionality is provided.
    Type: Grant
    Filed: June 28, 2001
    Date of Patent: October 8, 2002
    Assignee: Intel Corporation
    Inventors: Jeongjin Roh, Vijayakumaran V. Nair