Patents by Inventor Jeong S. Byun

Jeong S. Byun has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5607884
    Abstract: A method for fabricating an MOS transistor having a source/drain region of shallow junction and a thin silicide film is disclosed. The present method takes advantage of the phase separation of the Ti-excessed titanium nitride film and is capable of forming a thin silicide film in a once metal thermal annealing process. The method employs dopant implant to the titanium nitride and silicide and thermal anneal for diffusion to form source and drain regions.
    Type: Grant
    Filed: February 2, 1994
    Date of Patent: March 4, 1997
    Assignee: LG Semicon Co., Ltd.
    Inventor: Jeong S. Byun
  • Patent number: 5604140
    Abstract: A method for forming a fine titanium nitride film and a method for fabricating a semiconductor element using this method. The method for forming a fine titanium nitride film includes the steps of depositing a titanium nitride film on a semiconductor substrate such as with a reactive sputtering method, introducing oxygen into the columnar structured grain boundaries of the titanium nitride film such as by exposing the titanium nitride film to atmosphere, depositing a titanium film on the titanium nitride film having oxygen stuffed therein, converting the titanium film into a fine titanium nitride film by subjecting the titanium film to two times of a heat treatment process. In case a COB DRAM element bit line is formed of tungsten, the fine titanium nitride film and the underlying oxygen-stuffed titanium nitride film, serving as barriers for preventing high temperature diffusion of the tungsten, allow a tungsten bit line having excellent contact and barrier properties.
    Type: Grant
    Filed: May 22, 1995
    Date of Patent: February 18, 1997
    Assignee: LG Semicon, Co. Ltd.
    Inventor: Jeong S. Byun
  • Patent number: 5599734
    Abstract: A method for fabricating an MOS transistor includes the steps of forming a gate insulating layer on a substrate of a first conductivity-type, forming a gate on the gate insulating layer, forming a disposable layer over an entire surface of the substrate and the gate, the disposable layer having a first conductivity-type impurity and a second conductivity-type impurity of a higher concentration than that of the first conductivity-type impurity, and forming a source and drain area of the second conductivity-type impurity on the substrate by diffusing the second conductivity-type impurity of the disposable layer into the substrate by means of an annealing process, wherein the disposable layer includes a BPSG layer, wherein the BPSG layer is a B+PSG layer which is doped with a higher dopant concentration of boron than that of phosphorus to make a p-type MOS transistor.
    Type: Grant
    Filed: June 6, 1995
    Date of Patent: February 4, 1997
    Assignee: LG Semicon Co., Ltd.
    Inventors: Jeong S. Byun, Sang J. Choi
  • Patent number: 5597745
    Abstract: A method for forming a fine-textured titanium nitride film and fine-textured titanium nitride/thin titanium silicide films, and methods for fabricating semiconductor elements utilizing the same are disclosed. A thin titanium silicide film and a fine-textured nitride film are formed on a semiconductor substrate through depositing a titanium film containing nitrogen on the semiconductor substrate by sputtering a titanium target having a titanium nitride film formed thereon and quenching. A bit line of a COB DRAM element may be formed of tungsten, and a tungsten bit line having good contact characteristics and preserved barrier characteristics can be formed since the fine-textured titanium nitride/thin titanium silicide films may serve as a barrier preventing the tungsten from diffusing at high temperature during subsequent capacitor forming processes.
    Type: Grant
    Filed: April 17, 1995
    Date of Patent: January 28, 1997
    Assignee: L G Semicon Co., Ltd.
    Inventors: Jeong S. Byun, Hak N. Kim
  • Patent number: 5591667
    Abstract: A method for fabricating an MOS transistor includes the steps of forming a gate insulating layer on a substrate of a first conductivity-type, forming a gate on the gate insulating layer, forming a disposable layer over an entire surface of the substrate and the gate, the disposable layer having a first conductivity-type impurity and a second conductivity-type impurity of a higher concentration than that of the first conductivity-type impurity, and forming a source and drain area of the second conductivity-type impurity on the substrate by diffusing the second conductivity-type impurity of the disposable layer into the substrate by means of an annealing process, wherein the disposable layer includes a BPSG layer.
    Type: Grant
    Filed: May 22, 1995
    Date of Patent: January 7, 1997
    Assignee: LG Semicon Co., Ltd.
    Inventors: Jeong S. Byun, Sang J. Choi
  • Patent number: 5413957
    Abstract: A method for fabricating an MOS transistor having a source/drain region of shallow junction and a thin silicide film is disclosed.The present method taking advantage of the phase separation of a titanium nitride is capable of forming a thin silicide film in one metal heat treatment process and thus, simplifying the processes as compared with conventional methods employing two heat treatments. In addition, the consumption of a source/drain region is minimized, so that a titanium silicide film suitable to shallow junction can be obtained, preventive of the increase of contact resistance. Further, the improvement of device characteristic are also attributed to the lack of metal bridge, which results from the function of the phase separation phenomenon preventing the formation of the metal bridge in spite of the heat treatment of high temperature.
    Type: Grant
    Filed: January 24, 1994
    Date of Patent: May 9, 1995
    Assignee: Goldstar Electron Co., Ltd.
    Inventor: Jeong S. Byun