Abstract: A fingerprint sensing control method for sensing one or more sensing signals from a fingerprint sensing device having a plurality of sensing areas, each of the sensing areas having a plurality of sensing units, the sensing control method includes determining a sensitivity of the fingerprint sensing device; and obtaining the one or more the fingerprint sensing signals from the fingerprint sensing device, wherein one or more of the plurality of sensing units are grouped so as to achieve the sensitivity, and for a first sensitivity of the sensing device, a first number of one or more sensing units are grouped, and for a second sensitivity of the fingerprint sensing device, a second number of one or more sensing units are grouped, and the second sensitivity is greater than the first sensitivity and the second number is greater than the first number.

Abstract: A fingerprint sensing control method for sensing one or more sensing signals from a fingerprint sensing device having a plurality of sensing areas, each of the sensing areas having a plurality of sensing units, the sensing control method includes determining a sensitivity of the fingerprint sensing device; and obtaining the one or more the fingerprint sensing signals from the fingerprint sensing device, wherein one or more of the plurality of sensing units are grouped so as to achieve the sensitivity, and for a first sensitivity of the sensing device, a first number of one or more sensing units are grouped, and for a second sensitivity of the fingerprint sensing device, a second number of one or more sensing units are grouped, and the second sensitivity is greater than the first sensitivity and the second number is greater than the first number.

Abstract: A touch control method for sensing one or more touch signals from a touch device having a plurality of sensing areas, each of the sensing areas having a plurality of touch units, the touch control method includes determining a sensitivity of the touch device; and sensing the one or more the touch signals from the touch device, wherein one or more of the plurality of touch units located in the same sensing area are grouped so as to achieve the sensitivity, and for a first sensitivity of the touch device, a first number of touch units are grouped in the same sensing area, and for a second sensitivity of the touch device, a second number of touch units are grouped in the same sensing area, and the second sensitivity is greater than the first sensitivity and the second number is greater than the first number.

Abstract: A touch control method for sensing one or more touch signals from a touch device having a plurality of sensing areas, each of the sensing areas having a plurality of touch units, the touch control method includes determining a sensitivity of the touch device; and sensing the one or more the touch signals from the touch device, wherein one or more of the plurality of touch units located in the same sensing area are grouped so as to achieve the sensitivity, and for a first sensitivity of the touch device, a first number of touch units are grouped in the same sensing area, and for a second sensitivity of the touch device, a second number of touch units are grouped in the same sensing area, and the second sensitivity is greater than the first sensitivity and the second number is greater than the first number.

Abstract: A touch control module for sensing one or more touch signals from a touch device having a plurality of sensing areas, wherein each of the sensing areas having a plurality of touch units, includes a plurality of first switches; a plurality of second switches; a plurality of first sensing units, each of the first sensing unit being coupled to one of the touch units through one of the first switches; and a plurality of second sensing units, each of the second sensing units being coupled to the plurality of touch units located in the same sensing area through the plurality of second switches.

Abstract: A touch control module for sensing one or more touch signals from a touch device having a plurality of sensing areas, wherein each of the sensing areas having a plurality of touch units, includes a plurality of first switches; a plurality of second switches; a plurality of first sensing units, each of the first sensing unit being coupled to one of the touch units through one of the first switches; and a plurality of second sensing units, each of the second sensing units being coupled to the plurality of touch units located in the same sensing area through the plurality of second switches.

Abstract: An analog to digital conversion method includes charging a capacitor through an analog signal to sample a voltage of the analog signal; coupling the capacitor and a plurality of reference voltages to a comparator when a voltage of the capacitor is equal to the voltage of the analog signal, to compare the voltage of the capacitor with the reference voltages and generate a first comparison result; coupling the capacitor to a ramp generator when a status of the first comparison result changes, to compare a ramp signal of the ramp generator with a voltage difference of a first reference voltage and the voltage of the capacitor and generate a second comparison result; obtaining a voltage of the ramp signal when a status of the second comparison result changes; and obtaining a digital code of the analog signal according to the first reference voltage and the voltage of the ramp signal.

Abstract: An analog to digital conversion method includes charging a capacitor through an analog signal to sample a voltage of the analog signal; coupling the capacitor and a plurality of reference voltages to a comparator when a voltage of the capacitor is equal to the voltage of the analog signal, to compare the voltage of the capacitor with the reference voltages and generate a first comparison result; coupling the capacitor to a ramp generator when a status of the first comparison result changes, to compare a ramp signal of the ramp generator with a voltage difference of a first reference voltage and the voltage of the capacitor and generate a second comparison result; obtaining a voltage of the ramp signal when a status of the second comparison result changes; and obtaining a digital code of the analog signal according to the first reference voltage and the voltage of the ramp signal.

Abstract: A phase-locked loop system is provided. The system includes a charge pump, a voltage-controlled oscillator (VCO) and a bias converter. The charge pump outputs a control voltage according to a phase frequency detection signal, and generates an output current according to a bias signal. The VCO generates an output signal according to the control voltage. The bias converter is coupled between the VCO and the charge pump and for generating the bias signal according to the control voltage.

Abstract: A latch comparator device includes a differential input amplifier coupled between a first system voltage and a second system voltage and including a first differential output signal terminal and a second differential output signal terminal, a latch coupled to a third system voltage including a first latch signal terminal and a second latch signal terminal, a switch module including a first switch device and a second switch device, wherein the first switch device is coupled between the first differential output signal terminal and the second latch signal terminal and the second switch device is coupled between the second differential output signal terminal and the first latch signal terminal, and a third switch device is coupled between the latch and a fourth system voltage.

Abstract: A correlated double sampling device (CDS device) of an image sensor is provided. The CDS device is coupled to a plurality of light-sensing pixels arranged along a first direction. The CDS device of the image sensor includes a regulator and a sampling circuit. The regulator provides the light-sensing pixels with a first voltage so that at least one of the light-sensing pixels provides a first linear current and a second linear current according to the first voltage. The sampling circuit is coupled between a second voltage and the regulator and includes a first sampling unit and a second sampling unit to respectively receive the first linear current for a first duration and the second linear current for a second duration and to respectively and correspondingly output a first sampling signal and a second sampling signal.

Abstract: An image sensor and a column analog-to-digital converter thereof are provided. The column analog-to-digital converter includes a counter providing a counter result, a ramp signal generator providing a ramp signal and a start signal, a sampling and comparing array, a first latch array, a second latch array, and an arithmetic unit. The sampling and comparing array outputs a plurality of brightness transformation signals according to the ramp signal, the start signal, and initial voltages and brightness voltages of a plurality of photosensitive pixels. The first and the second latch arrays latch the counter result in response to the brightness transformation signals and output a plurality of first brightness latch values during a first period and a plurality of second brightness latch values during a second period. The arithmetic unit calculates the brightness values of the photosensitive pixels according to the first brightness latch values and the second brightness latch values.

Abstract: A pre-driver includes first to fourth transistors and first and second impedance elements. The first transistor, coupled between the first output terminal and a first node, has a gate coupled to the first differential input terminal. The second transistor, coupled between the second differential output terminal and the first node, has a gate coupled to the second differential input terminal. The third transistor, coupled between the first differential output terminal and a second node, has a gate coupled to the first differential input terminal. The fourth transistor, coupled between the second differential output terminal and the second node, has a gate coupled to the second differential input terminal. The first and second impedance elements are coupled between the first differential output terminal and a third node, and coupled between the second differential output terminal and the third node, respectively, wherein the third node is biased to a preset voltage.

Abstract: A correlated double sampling device (CDS device) of an image sensor is provided. The CDS device is coupled to a plurality of light-sensing pixels arranged along a first direction. The CDS device of the image sensor includes a regulator and a sampling circuit. The regulator provides the light-sensing pixels with a first voltage so that at least one of the light-sensing pixels provides a first linear current and a second linear current according to the first voltage. The sampling circuit is coupled between a second voltage and the regulator and includes a first sampling unit and a second sampling unit to respectively receive the first linear current for a first duration and the second linear current for a second duration and to respectively and correspondingly output a first sampling signal and a second sampling signal.

Abstract: A pre-driver includes first to fourth transistors and first and second impedance elements. The first transistor, coupled between the first output terminal and a first node, has a gate coupled to the first differential input terminal. The second transistor, coupled between the second differential output terminal and the first node, has a gate coupled to the second differential input terminal. The third transistor, coupled between the first differential output terminal and a second node, has a gate coupled to the first differential input terminal. The fourth transistor, coupled between the second differential output terminal and the second node, has a gate coupled to the second differential input terminal. The first and second impedance elements are coupled between the first differential output terminal and a third node, and coupled between the second differential output terminal and the third node, respectively, wherein the third node is biased to a preset voltage.

Abstract: Embodiments of addressing the programming disturb effect are shown. A medium voltage having a magnitude between the programming voltage and ground is applied to a metal bit line among the cells that are subject to the program disturb effect.

Abstract: A memory and a low offset clamp bias circuit thereof are provided. The low offset clamp bias circuit is adapted for any existing memory and is used for reducing the variation of a drain side voltage Vd supplied to a memory cell in a memory cell array area through the feedback mechanism formed by a clamp bias modulator and a constant voltage generator. Thereby, the accuracy in reading, writing, or erasing data in the memory can be improved.

Abstract: A program circuit and method for a flash memory is provided. This invention utilizes a constant current to program the flash memory and modulate the threshold voltage of the flash memory. While a program circuit programming the flash memory, the present invention determines whether the threshold voltage reaches the anticipated value according to the variation of the drain voltage of the flash memory. Hence, the present invention can accurately modulate the threshold voltage of the programmed flash memory and shorten the programming time.

Abstract: A program circuit and method for a flash memory is provided. This invention utilizes a constant current to program the flash memory and modulate the threshold voltage of the flash memory. While a program circuit programming the flash memory, the present invention determines whether the threshold voltage reaches the anticipated value according to the variation of the drain voltage of the flash memory. Hence, the present invention can accurately modulate the threshold voltage of the programmed flash memory and shorten the programming time.

Abstract: A memory and a low offset clamp bias circuit thereof are provided. The low offset clamp bias circuit is adapted for any existing memory and is used for reducing the variation of a drain side voltage Vd supplied to a memory cell in a memory cell array area through the feedback mechanism formed by a clamp bias modulator and a constant voltage generator. Thereby, the accuracy in reading, writing, or erasing data in the memory can be improved.