Patents by Inventor Jeremy Buan
Jeremy Buan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11843383Abstract: Example implementations described herein are directed to reducing far end cross talk (FEXT), including differential-to-differential far end crosstalk (DDFEXT) or single ended FEXT through generating and applying a delay shifter/inverter that is cascaded onto a target electrical system and shifts the even-mode and odd-mode propagation delay of a target electrical system to be substantially equal, which in turn reduces FEXT in the overall system.Type: GrantFiled: June 25, 2021Date of Patent: December 12, 2023Assignee: Hirose Electric Co., Ltd.Inventors: Ching-Chao Huang, Jeremy Buan, Jingqian Tian, Tadashi Ohshida
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Publication number: 20230094831Abstract: Example implementations described herein involve a media adaptor configured to provide electrical/optical and optical/electrical conversion for a multi-mode waveguide (MMWG) interconnect, the media adaptor involving one or more ball grid arrays; and a tail-cut fiber array block (tcFAB) connected to a first array of photodiodes and a second array of laser diodes from direct optical wire (DOW) bonding.Type: ApplicationFiled: September 13, 2022Publication date: March 30, 2023Inventors: Kihong KIM, Jeremy Buan, Yutaka Iwasaki
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Patent number: 11609478Abstract: Example implementations described herein are directed to an interface configured to redirect light between a connector connected to a printed optical board (POB) via an optical waveguide, and a photonic integrated circuit (PIC), the interface involving two-dimensionally distributed waveplates (TDWs) having multiple layers of p-doped and n-doped silicon, the TDWs configured to be driven to change a dielectric constant at a two dimensional location on the TDWs such that the received light is redirected at the two dimensional location.Type: GrantFiled: May 26, 2021Date of Patent: March 21, 2023Assignee: Hirose Electric Co., Ltd.Inventors: Kihong Kim, Jeremy Buan, Tsutomu Matsuo, Tadashi Ohshida
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Patent number: 11585981Abstract: Example implementations described herein are directed to a system involving one or more photonic integrated circuits having multi-mode waveguides and connected to a printed optical board through the use of multi-mode waveguide connectors described herein. The printed optical board can include an embedded multi-mode waveguide bus to facilitate optical signal to and from the photonic integrated circuits. The system can also include a chiplet such as a photonic integrated circuit with a single mode waveguide configured to connect to an optical fiber cable.Type: GrantFiled: March 29, 2021Date of Patent: February 21, 2023Assignee: Hirose Electric Co., Ltd.Inventors: Kihong Kim, Jeremy Buan, Tadashi Ohshida, Tsutomu Matsuo, Shuji Suzuki, Nobuhiro Tamai, Hiromichi Muraoka
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Patent number: 11581883Abstract: A method of manufacturing an electrical system for reducing differential-to-differential far end crosstalk (DDFEXT) includes converting a first S parameter representative of a design of a first electrical system into a differential-only S parameter, generating a second differential-only S parameter configured to add even-mode propagation delay and odd-mode propagation delay of the differential-only S parameter of the electrical system such that a total even-mode propagation delay and odd-mode propagation delay of the differential-only S parameter are substantially equivalent, and reconfiguring a second electrical system from the differential-only S parameter and the second differential-only S parameter.Type: GrantFiled: March 10, 2022Date of Patent: February 14, 2023Assignee: Hirose Electric Co., Ltd.Inventors: Ching-Chao Huang, Jeremy Buan, Jingqian Tian, Tadashi Ohshida
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Publication number: 20220200587Abstract: A method of manufacturing an electrical system for reducing differential-to-differential far end crosstalk (DDFEXT) includes converting a first S parameter representative of a design of a first electrical system into a differential-only S parameter, generating a second differential-only S parameter configured to add even-mode propagation delay and odd-mode propagation delay of the differential-only S parameter of the electrical system such that a total even-mode propagation delay and odd-mode propagation delay of the differential-only S parameter are substantially equivalent, and reconfiguring a second electrical system from the differential-only S parameter and the second differential-only S parameter.Type: ApplicationFiled: March 10, 2022Publication date: June 23, 2022Inventors: Ching-Chao HUANG, Jeremy BUAN, Jingqian TIAN, Tadashi OHSHIDA
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Publication number: 20220038083Abstract: Example implementations described herein are directed to reducing far end cross talk (FEXT), including differential-to-differential far end crosstalk (DDFEXT) or single ended FEXT through generating and applying a delay shifter/inverter that is cascaded onto a target electrical system and shifts the even-mode and odd-mode propagation delay of a target electrical system to be substantially equal, which in turn reduces FEXT in the overall system.Type: ApplicationFiled: June 25, 2021Publication date: February 3, 2022Inventors: Ching-Chao HUANG, Jeremy BUAN, Jingqian TIAN, Tadashi OHSHIDA
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Publication number: 20210389642Abstract: Example implementations described herein are directed to an interface configured to redirect light between a connector connected to a printed optical board (POB) via an optical waveguide, and a photonic integrated circuit (PIC), the interface involving two-dimensionally distributed waveplates (TDWs) having multiple layers of p-doped and n-doped silicon, the TDWs configured to be driven to change a dielectric constant at a two dimensional location on the TDWs such that the received light is redirected at the two dimensional location.Type: ApplicationFiled: May 26, 2021Publication date: December 16, 2021Inventors: Kihong KIM, Jeremy BUAN, Tsutomu MATSUO, Tadashi OHSHIDA
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Publication number: 20210325608Abstract: Example implementations described herein are directed to a system involving one or more photonic integrated circuits having multi-mode waveguides and connected to a printed optical board through the use of multi-mode waveguide connectors described herein. The printed optical board can include an embedded multi-mode waveguide bus to facilitate optical signal to and from the photonic integrated circuits. The system can also include a chiplet such as a photonic integrated circuit with a single mode waveguide configured to connect to an optical fiber cable.Type: ApplicationFiled: March 29, 2021Publication date: October 21, 2021Inventors: Kihong KIM, Jeremy BUAN, Tadashi OHSHIDA, Tsutomu MATSUO, Shuji SUZUKI, Nobuhiro TAMAI, Hiromichi MURAOKA
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Patent number: 10756465Abstract: The first terminals have contact arm portions extending in a rectilinear manner in the direction of connector plugging and unplugging; the second terminals have convex contact point portions contactable with an intermediate portion of the contact arm portions in the same direction. When the stub portions of the contact arm portions are divided into a free end side range and a proximal end side range such that the center point of said stub portions in the direction of plugging and unplugging forms a boundary, in the arranged state of the first terminals, impedance at arbitrary locations in the direction of plugging and unplugging within the free end side range is larger than impedance at arbitrary locations in the plugging direction within the proximal end side range.Type: GrantFiled: September 6, 2019Date of Patent: August 25, 2020Assignee: HIROSE ELECTRIC CO., LTD.Inventors: Nobuhiro Tamai, Shota Yamada, Clement Kam Lam Luk, Jeremy Buan, Ching-Chao Huang, Tadashi Ohshida
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Publication number: 20200083622Abstract: The first terminals have contact arm portions extending in a rectilinear manner in the direction of connector plugging and unplugging; the second terminals have convex contact point portions contactable with an intermediate portion of the contact arm portions in the same direction. When the stub portions of the contact arm portions are divided into a free end side range and a proximal end side range such that the center point of said stub portions in the direction of plugging and unplugging forms a boundary, in the arranged state of the first terminals, impedance at arbitrary locations in the direction of plugging and unplugging within the free end side range is larger than impedance at arbitrary locations in the plugging direction within the proximal end side range.Type: ApplicationFiled: September 6, 2019Publication date: March 12, 2020Inventors: Nobuhiro TAMAI, Shota YAMADA, Clement Kam Lam LUK, Jeremy BUAN, Ching-Chao HUANG, Sunao OSHIDA
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Patent number: 10249989Abstract: Example implementations described herein are directed to a method and apparatus for improving insertion loss of connector stub and thereby increasing a system's signal bandwidth. This technique shapes the connector stub in a specific way to shift its resonant frequency higher while having equal or better electrical performance below the original resonant frequency.Type: GrantFiled: January 24, 2018Date of Patent: April 2, 2019Assignee: HIROSE ELECTRIC CO., LTD.Inventors: Clement Luk, Jeremy Buan, Tadashi Ohshida, Ching-Chao Huang
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Publication number: 20180261961Abstract: Example implementations described herein are directed to a method and apparatus for improving insertion loss of connector stub and thereby increasing a system's signal bandwidth. This technique shapes the connector stub in a specific way to shift its resonant frequency higher while having equal or better electrical performance below the original resonant frequency.Type: ApplicationFiled: January 24, 2018Publication date: September 13, 2018Inventors: Clement LUK, Jeremy BUAN, Tadashi OHSHIDA, Ching-Chao HUANG
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Patent number: 8357013Abstract: The present invention involves connectors for reducing Far-End Crosstalk (FEXT) through the use of novel polarity swapping to negate the cumulative effect of FEXT. Skew adjustment is used to improve the FEXT cancellation from polarity swapping. The polarity reversal location or locations among FEXT sources are optimized to achieve maximum FEXT cancellation. The novelty polarity swapping technique can be applied to a wide variety of connectors, such as mezzanine connectors, backplane connectors, and any other connectors that can benefit from FEXT reduction.Type: GrantFiled: November 5, 2009Date of Patent: January 22, 2013Assignee: Hirose Electric Co., Ltd.Inventors: Tatsuya Arai, Ching-Chao Huang, Clement Kam Lam Luk, Jeremy Buan, Tsutomu Matsuo, Toshiyuki Takada, Masakazu Nagata
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Publication number: 20100184307Abstract: The present invention involves connectors for reducing Far-End Crosstalk (FEXT) through the use of novel polarity swapping to negate the cumulative effect of FEXT. Skew adjustment is used to improve the FEXT cancellation from polarity swapping. The polarity reversal location or locations among FEXT sources are optimized to achieve maximum FEXT cancellation. The novelty polarity swapping technique can be applied to a wide variety of connectors, such as mezzanine connectors, backplane connectors, and any other connectors that can benefit from FEXT reduction.Type: ApplicationFiled: November 5, 2009Publication date: July 22, 2010Applicant: Hirose Electric USA Inc.Inventors: Tatsuya Arai, Ching-Chao Huang, Clement Kam Lam Luk, Jeremy Buan, Tsutomu Matsuo, Toshiyuki Takada, Masakazu Nagata
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Publication number: 20100183141Abstract: The present invention involves chip-to-chip communication systems for reducing Far-End Crosstalk (FEXT) through the use of novel polarity swapping to negate the cumulative effect of FEXT. Skew adjustment is used to improve the FEXT cancellation from polarity swapping. The polarity reversal location or locations among FEXT sources are optimized to achieve maximum FEXT cancellation. The novelty polarity swapping technique can be applied to a wide variety of systems that can benefit from FEXT reduction.Type: ApplicationFiled: November 5, 2009Publication date: July 22, 2010Applicant: Hirose Electric USA Inc.Inventors: Tatsuya Arai, Ching-Chao Huang, Clement Kam Lam Luk, Jeremy Buan, Tsutomu Matsuo, Toshiyuki Takada, Masakazu Nagata