Patents by Inventor Jeremy David Fields

Jeremy David Fields has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230175117
    Abstract: Methods of filling a gap with a dielectric material including using an inhibitor plasma during deposition. The inhibitor plasma increases a nucleation barrier of the deposited film. When the inhibitor plasma interacts with material in the feature, the material at the bottom of the feature receives less plasma treatment than material located closer to a top portion of the feature or in field. Deposition at the top of the feature is then selectively inhibited and deposition in lower portions of the feature proceeds with less inhibition or without being inhibited. As a result, bottom-up fill is enhanced, which can create a sloped profile that mitigates the seam effect and prevents void formation. In some embodiments, an underlying material at the top of the feature is protected using an integrated liner. In some embodiments, a hydrogen chemistry is used during gap fill to reduce seam formation.
    Type: Application
    Filed: March 31, 2021
    Publication date: June 8, 2023
    Inventors: Dustin Zachary AUSTIN, Ian John CURTIN, Joseph R. ABEL, Bart J. VAN SCHRAVENDIJK, Seshasayee VARADARAJAN, Adrien LAVOIE, Jeremy David FIELDS, Pulkit AGARWAL, Shiva Sharan BHANDARI
  • Publication number: 20230002887
    Abstract: Methods for filling gaps with dielectric material involve deposition using an atomic layer deposition (ALD) technique to fill a gap followed by deposition of a cap layer on the filled gap by a chemical vapor deposition (CVD) technique. The ALD deposition may be a plasma-enhanced ALD (PEALD) or thermal ALD (tALD) deposition. The CVD deposition may be plasma-enhanced CVD (PECVD) or thermal CVD (tCVD) deposition. In some embodiments, the CVD deposition is performed in the same chamber as the ALD deposition without intervening process operations. This in-situ deposition of the cap layer results in a high throughput process with high uniformity. After the process, the wafer is ready for chemical-mechanical planarization (CMP) in some embodiments.
    Type: Application
    Filed: December 1, 2020
    Publication date: January 5, 2023
    Inventors: Jeremy David FIELDS, Ian John CURTIN, Joseph R. ABEL, Frank Loren PASQUALE, Douglas Walter AGNEW
  • Publication number: 20220375721
    Abstract: Radio frequency power conveyed to individual process stations of a multi-station integrated circuit fabrication chamber may be adjusted so as to bring the rates at which fabrication processes occur, and/or fabrication process results, into alignment with one another. Such adjustment in radio frequency power, which may be accomplished via adjusting one or more reactive elements of a RF distribution network, may give rise to an imbalance in power delivered to each individual process station.
    Type: Application
    Filed: October 23, 2020
    Publication date: November 24, 2022
    Inventors: Jeremy David Fields, Awnish Gupta, Chun-Hao Chen, Yaswanth Rangineni, Frank Loren Pasquale
  • Publication number: 20220351940
    Abstract: Methods and apparatuses for depositing thin films using plasma-enhanced atomic layer deposition (PEALD) with ramping radio-frequency (RF) power are provided herein. Embodiments involve increasing the RF power setting of PEALD cycles after formation of initial screening layers at low RF power settings.
    Type: Application
    Filed: November 5, 2020
    Publication date: November 3, 2022
    Inventors: Jeremy David Fields, Frank Loren Pasquale
  • Publication number: 20210395885
    Abstract: Processing methods and apparatus for increasing a reaction chamber batch size. Such a method of processing deposition substrates (e.g., wafers), involves conducting a deposition on a first portion of a batch of deposition wafers in a reaction chamber, conducting an interval conditioning reaction chamber purge to remove defects generated by the wafer processing from the reaction chamber; and following the interval conditioning mid-batch reaction chamber purge, conducting the deposition on another portion of the batch of wafers in the reaction chamber. The interval conditioning reaction chamber purge is conducted prior to exceeding a baseline for acceptable defect (e.g., particle) generation in the chamber and is performed while no wafers are positioned in the reaction chamber.
    Type: Application
    Filed: November 27, 2019
    Publication date: December 23, 2021
    Applicant: Lam Research Corporation
    Inventors: Chun-Hao Chen, Jeremy David Fields, Frank Loren Pasquale