Patents by Inventor Jerome L. Brekken

Jerome L. Brekken has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6487765
    Abstract: The tool comprises a body having a top portion within which is formed a generally U-shaped notch with a width and depth that are much larger than the diameter of the wire to be handled. The sides of the notch are outwardly tapered so that the notch is wider at its top. All edges of the notch are smoothed and have a radius such that there is no binding of the wire onto the tool. The design of the tool allows the wire to easily slip across the bottom of the notch without binding. The lower portion of the cylinder comprises a concentric bore for receiving a pole or other lifting device.
    Type: Grant
    Filed: March 27, 2002
    Date of Patent: December 3, 2002
    Inventor: Jerome L. Brekken
  • Patent number: 6467823
    Abstract: The tool comprises a body having a top portion within which is formed a generally U-shaped notch with a width and depth that are much larger than the diameter of the wire to be handled. The sides of the notch are outwardly tapered so that the notch is wider at its top. All edges of the notch are smoothed and have a radius such that there is no binding of the wire onto the tool. The design of the tool allows the wire to easily slip across the bottom of the notch without binding. The lower portion of the cylinder comprises a concentric bore for receiving a pole or other lifting device.
    Type: Grant
    Filed: June 12, 2000
    Date of Patent: October 22, 2002
    Inventor: Jerome L. Brekken
  • Patent number: 5132757
    Abstract: An LDD field effect transistor is fabricated by a series of process steps in which throughout the fabrication process, the transistor's polysilicon gate is protected from being oxidized on its edges near the gate insulator. Some of the process steps during which the above protection occurs includes steps for forming spacers on the sidewalls of the transistor's gate, and steps for activating the LDD source-drain regions with high temperature anneals. Due to this protection from oxidation, none of the silicon in the edges of the gate is consumed or converted to silicon dioxide at any stage of the fabrication process. Consequently, the distance by which the edges of the gate are spaced over the channel remains unaltered throughout the fabrication process; and, this physical feature of the gate makes the transistor's saturation current large with little variance.
    Type: Grant
    Filed: November 16, 1990
    Date of Patent: July 21, 1992
    Assignee: Unisys Corporation
    Inventors: Stephen L. Tignor, Michael A. Stuber, Jerome L. Brekken