Abstract: A finger biometric sensing device may include drive circuitry capable of generating a drive signal and an array of finger biometric sensing pixel electrodes cooperating with the drive circuitry and capable of generating a detected signal based upon placement of a finger adjacent the array of finger biometric sensing pixel electrodes. The detected signal may include a relatively large drive signal component and a relatively small sense signal component superimposed thereon. The finger biometric sensing device may also include a gain stage coupled to the array of finger biometric sensing pixel electrodes, and drive signal nulling circuitry coupled to the gain stage capable of reducing the relatively large drive signal component from the detected signal.

Abstract: A finger biometric sensing device may include an array of finger biometric sensing pixel electrodes and a gain stage coupled to the array of finger biometric sensing pixel electrodes. The finger biometric sensing device may also include error compensation circuitry that may include a memory capable of storing error compensation data. The error correction circuitry may also include a digital-to-analog converter (DAC) cooperating with the memory and coupled to the gain stage and capable of compensating for at least one error based upon the stored error compensation data.

Abstract: A finger biometric sensing device may include drive circuitry capable of generating a drive signal and an array of finger biometric sensing pixel electrodes cooperating with the drive circuitry and capable of generating a detected signal based upon placement of a finger adjacent the array of finger biometric sensing pixel electrodes. The detected signal may include a relatively large drive signal component and a relatively small sense signal component superimposed thereon. The finger biometric sensing device may also include a gain stage coupled to the array of finger biometric sensing pixel electrodes, and drive signal nulling circuitry coupled to the gain stage capable of reducing the relatively large drive signal component from the detected signal.

Abstract: A finger biometric sensing device may include drive circuitry capable of generating a drive signal and an array of finger biometric sensing pixel electrodes cooperating with the drive circuitry and capable of generating a detected signal based upon placement of a finger adjacent the array of finger biometric sensing pixel electrodes. The detected signal may include a relatively large drive signal component and a relatively small sense signal component superimposed thereon. The finger biometric sensing device may also include a gain stage coupled to the array of finger biometric sensing pixel electrodes, and drive signal nulling circuitry coupled to the gain stage capable of reducing the relatively large drive signal component from the detected signal.

Abstract: A finger biometric sensing device may include drive circuitry capable of generating a drive signal and an array of finger biometric sensing pixel electrodes cooperating with the drive circuitry and capable of generating a detected signal based upon placement of a finger adjacent the array of finger biometric sensing pixel electrodes. The detected signal may include a relatively large drive signal component and a relatively small sense signal component superimposed thereon. The finger biometric sensing device may also include a gain stage coupled to the array of finger biometric sensing pixel electrodes, and drive signal nulling circuitry coupled to the gain stage capable of reducing the relatively large drive signal component from the detected signal.

Abstract: A single event upset immune latch circuit comprises a first latch having first and second complementary channel inverters respective input nodes and output nodes of which are cross-coupled to one another. First second pairs of (complementary channel) decoupling transistors respectively couple the output nodes of said first and second complementary channel inverters in circuit with first and second voltage supply terminals. (Cross-)coupled with the first latch is a second latch having third and fourth complementary channel inverters, respective input nodes and output nodes of which are cross-coupled to one another. Third and fourth pairs of (complementary channel) decoupling transistors respectively couple the third and fourth complementary channel inverters in circuit with the first and second voltage supply terminals.