Abstract: The radiation hardened NFET and process of the subject Methods and Structures for Improving Radiation Tolerance of Silicon Gate CMOS/Silicon on Sapphire Devices utilizes boron edge doping of a silicon epi island on sapphire at the island opposed edges in the region which will be the P-doped region of the finished transistor. Multiple boron ion implants are made into the silicon adjacent to the active region and driven-in to provide a uniform edge doping. Alternatively, a furnace containing a source of boron vapor and the sapphire wafer is used to dope the island edges at high temperatures.