Abstract: A microprocessor, specially adapted for graphics processing applications, and which has a self-emulation capability by which the contents of its internal registers may be dumped or loaded to or from external memory on an instruction-by-instruction basis, is disclosed. The microprocessor has circuitry which is responsive to an emulate enable signal, or to a predetermined instruction code, so that normal execution is halted at the end of the ion, with execution jumping to a predetermined vector. Responsive to a dump signal, the microprocessor begins execution of a routine which presents a predetermined series of memory addresses on a memory bus, in conjunction with the contents of registers internal to the microprocessor. Accordingly, the addressed locations of a memory device connected to the memory bus can be written with the register contents, for subsequent interrogation by the user.

Abstract: The present invention involves an improvement in color palettes which translate pixel color codes into color data words which have differing bits. In the color palette a stream of pixel color codes from a pixel map memory enables sequential selection of one of a set of color registers. The color data word stored in the selected color register controls the color of the current pixel within the video display. The innovation of the present invention is providing at least one color data word within the color palette which has no corresponding color of its own but which enables a repetition of the previous color. The entire visual image can be redefined by merely changing the pixel color codes at the first scanned edges of color regions if the entire pixel map memory is filled with pixel color codes which refer to repeat color data words. Hidden objects formed in the pixel map memory can be made to appear or disappear by redefining the color data words in the color registers.

Abstract: The present invention loads color registers of a color look up table in a color palette and recalls color data words from the color registers using only a single set of address and data channels. The color palette operates in two modes. In a normal mode one color code from a stream of pixel color codes received from a pixel map memory is employed to select one of the color registers. These color registers store color data words which define colors. A color data word stored in a selected color register is recalled and employed to control the color of a pixel on a raster scan video display. In a color look up table load mode, a predetermined number of the pixel color codes are loaded into the color look up table in a predetermined sequence, thereby defining a new set of colors. This technique multiplexes the existing data and control lines from the memory to the color palette for the two modes.

Abstract: A video system has a processor processing of data to be displayed on a CRT monitor. A memory which is the embodiment shown is a multiport dynamic random accessed memory, stores the data therein according to X and Y coordinates. A video controller controls the transfer of data between the processor and the memory; the controller also, has included therein an X and Y address logic for providing the X and Y coordinates to the memory.