Abstract: Solid gel beads formed from a gel product of a 5 carbon to 60 carbon alkane phase change material, 5 carbon to 60 carbon alkene phase change material, or a combination thereof and a styrene-based polymer are homogeneous, has an uneven exterior surface, and a major axis length in a range of 1000 ?m to 100 mm. Methods for making the solid gel bead include providing water having a preselected temperature based on a linear relationship to the melting point of a phase change material composition, mixing the phase change material composition with the styrene-based polymer at or below the preselected temperature with stirring to form a pulp, and mixing the pulp into the water with turbulent mixing while maintaining the temperature of the mixture at the preselected temperature.

Abstract: Solid gel beads formed from a gel product of a 5 carbon to 60 carbon alkane phase change material, 5 carbon to 60 carbon alkene phase change material, or a combination thereof and a styrene-based polymer are homogeneous, has an uneven exterior surface, and a major axis length in a range of 1000 ?m to 100 mm. Methods for making the solid gel bead include providing water having a preselected temperature based on a linear relationship to the melting point of a phase change material composition, mixing the phase change material composition with the styrene-based polymer at or below the preselected temperature with stirring to form a pulp, and mixing the pulp into the water with turbulent mixing while maintaining the temperature of the mixture at the preselected temperature.

Abstract: Thermal cooling gel and cold packs enclosing such thermal cooling gel have an aqueous gel of 1% to 10% wt/wt of cellulose, 0.5 g/L to 2 g/L of an ice nucleating protein, and a biocide. The enthalpy of the thermal cooling gel is in a range of 250 J/g to 330 J/g.

Abstract: Thermal cooling gel and cold packs enclosing such thermal cooling gel have an aqueous gel of 1% to 10% wt/wt of cellulose, 0.5 g/L to 2 g/L of an ice nucleating protein, and a biocide. The enthalpy of the thermal cooling gel is in a range of 250 J/g to 330 J/g.

Abstract: Systems and methods are provided that may be implemented to identify and track layer changes of an integrated circuit (IC) device, e.g., during any one of circuit design, pattern generation, device fabrication and/or chip failure analysis processes. Multiple revisions and variants of different IC layers may be identified and tracked using a tracking system and standardized labeling scheme that employs a combination of identifier characters and identifier structures that may be further implemented using revision layer identification parameterized cells (layerID PCells and BooleanID PCells) that include such identifier characters and/or structures The disclosed tracking systems may be further implemented in an automated manner and/or in a manner that allows programming of various parts/aspects and layerID PCells and BooleanID PCells of the tracking system.

Abstract: Systems and methods are provided that may be implemented to identify and track layer changes of an integrated circuit (IC) device, e.g., during any one of circuit design, pattern generation, device fabrication and/or chip failure analysis processes. Multiple revisions and variants of different IC layers may be identified and tracked using a tracking system and standardized labeling scheme that employs a combination of identifier characters and identifier structures that may be further implemented using revision layer identification parameterized cells (layerID PCells and BooleanID PCells) that include such identifier characters and/or structures The disclosed tracking systems may be further implemented in an automated manner and/or in a manner that allows programming of various parts/aspects and layerID PCells and BooleanID PCells of the tracking system.

Abstract: On-chip decoupling capacitors and methods for placing the same are disclosed in which designated spaces are created between the active circuits to insert designated capacitor cells. The designated capacitor cells may be placed in designated areas of the integrated circuit that are not simply spaces left empty by cell placement or frontier areas in or around the route, and the dimensions (e.g., height) of the designated capacitor cells may be selected to optimize (increase) capacitance efficiency. The capacitor cells may also be placed to target and reduce the interference between a digital core (aggressor) circuit and a victim analog circuit.

Abstract: On-chip decoupling capacitors and methods for placing the same are disclosed in which designated spaces are created between the active circuits to insert designated capacitor cells. The designated capacitor cells may be placed in designated areas of the integrated circuit that are not simply spaces left empty by cell placement or frontier areas in or around the route, and the dimensions (e.g., height) of the designated capacitor cells may be selected to optimize (increase) capacitance efficiency. The capacitor cells may also be placed to target and reduce the interference between a digital core (aggressor) circuit and a victim analog circuit.