Patents by Inventor Jesus Bajo Bautista, Jr.

Jesus Bajo Bautista, Jr. has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230207390
    Abstract: A method includes applying laser pulses along a direction to a side of a wafer to create first and second stealth damage regions at respective first and second depths in the wafer and to create cracks that extend in the wafer from the respective stealth damage regions and that are spaced apart from one another along the direction, applying a compressive and retractive cyclical force to the wafer along the third direction to propagate and join the cracks from the respective stealth damage regions together, and expanding the wafer to separate individual dies from the wafer.
    Type: Application
    Filed: December 23, 2021
    Publication date: June 29, 2023
    Inventors: Jesus Bajo Bautista, JR., Jeniffer Otero Aspuria, Francis Masiglat de Vera
  • Publication number: 20220157678
    Abstract: Integrated circuit packaging with cavities and methods of manufacturing the same are disclosed. An example apparatus includes a semiconductor die and a housing enclosing portions of the semiconductor die. The housing defines an opening that extends from a surface of the semiconductor die to an external environment, the housing formed of a first material. The example apparatus includes a second material disposed within the opening to block exposure of the semiconductor die to the external environment.
    Type: Application
    Filed: January 27, 2022
    Publication date: May 19, 2022
    Inventors: Jesus Bajo Bautista, Jr., Jeffrey Dorado Emperador, Francis Masiglat de Vera
  • Publication number: 20190206752
    Abstract: Integrated circuit packaging with cavities and methods of manufacturing the same are disclosed. An example apparatus includes a semiconductor die and a housing enclosing portions of the semiconductor die. The housing defines an opening that extends from a surface of the semiconductor die to an external environment, the housing formed of a first material. The example apparatus includes a second material disposed within the opening to block exposure of the semiconductor die to the external environment.
    Type: Application
    Filed: December 29, 2017
    Publication date: July 4, 2019
    Inventors: Jesus Bajo Bautista, JR., Jeffrey Dorado Emperador, Francis Masiglat de Vera
  • Publication number: 20140197534
    Abstract: A flip chip mounting board includes a substrate having a top surface and a plurality of generally parallel, longitudinally extending, laterally spaced apart bond fingers are formed on the top surface. Each of the plurality of bond fingers has a first longitudinal end portion and a second longitudinal end portion. A first strip of laterally extending solder resist material overlies the first longitudinal end portions of the bond fingers. The first strip has an edge wall with a plurality of longitudinally projecting tooth portions separated by gaps with a longitudinally extending tooth portion being aligned with every other one of the bond fingers. Adjacent bond fingers have first end portions covered by different longitudinal lengths of solder resist material.
    Type: Application
    Filed: January 16, 2013
    Publication date: July 17, 2014
    Applicant: Texas Instruments Incorporated
    Inventors: Raymond Maldan Partosa, Jesus Bajo Bautista, JR., James Raymond Baello, Roxanna Bauzon Samson
  • Patent number: 8381967
    Abstract: Methods of connecting solder bumps located on dies to leads located on substrates are disclosed herein. One embodiment includes applying a first compression force between the solder bump and the lead; relieving the first compression force between the solder bump and the lead; and applying a second compression force between the solder bump and the lead.
    Type: Grant
    Filed: January 5, 2012
    Date of Patent: February 26, 2013
    Assignee: Texas Instruments Incorporated
    Inventors: Mutsumi Masumoto, Jesus Bajo Bautista, Jr., Raymond Maldan Partosa, James Raymond Baello
  • Publication number: 20090026656
    Abstract: A mold system for forming a mold cap on a semiconductor component includes a mold base and a mold lid that together define a mold cavity. The mold base supports the semiconductor component within the mold cavity. The semiconductor component defines a component footprint and footprint periphery on the mold base. A supply channel is provided in the mold lid for supplying an encapsulating material to the mold cavity. At least one vent channel is provided in the mold base. The vent channel intersecting the footprint periphery to vent gas trapped between the semiconductor component and the mold base from the mold cavity when the encapsulating material is supplied to the mold cavity.
    Type: Application
    Filed: July 23, 2007
    Publication date: January 29, 2009
    Inventors: Jesus Bajo Bautista, JR., Victor Edgar Estioco Generosa, Fausto Praza Raguindin