Patents by Inventor Jhong-Sheng WANG
Jhong-Sheng WANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240040801Abstract: A memory device including bit lines, auxiliary lines, selectors, and memory cells is provided. The word lines are intersected with the bit lines. The auxiliary lines are disposed between the word lines and the of bit lines. The selectors are inserted between the bit lines and the auxiliary lines. The memory cells are inserted between the word lines and the auxiliary lines.Type: ApplicationFiled: October 11, 2023Publication date: February 1, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Ji-Feng Ying, Jhong-Sheng Wang, Tsann Lin
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Patent number: 11825664Abstract: A memory device including bit lines, auxiliary lines, selectors, and memory cells is provided. The word lines are intersected with the bit lines. The auxiliary lines are disposed between the word lines and the of bit lines. The selectors are inserted between the bit lines and the auxiliary lines. The memory cells are inserted between the word lines and the auxiliary lines.Type: GrantFiled: March 24, 2022Date of Patent: November 21, 2023Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Ji-Feng Ying, Jhong-Sheng Wang, Tsann Lin
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Publication number: 20230335171Abstract: A method of manufacturing an array of magnetic random access memory cells includes writing to a magnetic random access memory cell. The writing to a memory cell includes determining an optimum write current for the array of memory cells, and applying the optimum write current to a first memory cell in the array. A first read current is applied to the first memory cell to determine whether a magnetic orientation of the first memory cell has changed in response to applying the optimum write current. A second write current is applied to the first memory cell when the magnetic orientation of the first memory cell has not changed. The second write current is different from the optimum write current. A second read current is applied to the first memory cell to determine whether the magnetic orientation of the first memory cell changed in response to applying the second write current.Type: ApplicationFiled: June 22, 2023Publication date: October 19, 2023Inventors: Ji-Feng YING, Jhong-Sheng WANG, Baohua NIU
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Publication number: 20230263073Abstract: A magnetic memory includes a first spin-orbital-transfer-spin-torque-transfer (SOT-STT) hybrid magnetic device disposed over a substrate, a second SOT-STT hybrid magnetic device disposed over the substrate, and a SOT conductive layer connected to the first and second SOT-STT hybrid magnetic devices. Each of the first and second SOT-STT hybrid magnetic devices includes a first magnetic layer, as a magnetic free layer, a spacer layer disposed under the first magnetic layer, and a second magnetic layer, as a magnetic reference layer, disposed under the spacer layer. The SOT conductive layer is disposed over the first magnetic layer of each of the first and second SOT-STT hybrid magnetic devices.Type: ApplicationFiled: April 27, 2023Publication date: August 17, 2023Inventors: Ji-Feng YING, Jhong-Sheng WANG, Tsann LIN
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Patent number: 11727974Abstract: A method of manufacturing an array of magnetic random access memory cells includes writing to a magnetic random access memory cell. The writing to a memory cell includes determining an optimum write current for the array of memory cells, and applying the optimum write current to a first memory cell in the array. A first read current is applied to the first memory cell to determine whether a magnetic orientation of the first memory cell has changed in response to applying the optimum write current. A second write current is applied to the first memory cell when the magnetic orientation of the first memory cell has not changed. The second write current is different from the optimum write current. A second read current is applied to the first memory cell to determine whether the magnetic orientation of the first memory cell changed in response to applying the second write current.Type: GrantFiled: January 31, 2022Date of Patent: August 15, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Ji-Feng Ying, Jhong-Sheng Wang, Baohua Niu
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Patent number: 11672185Abstract: A magnetic memory includes a first spin-orbital-transfer-spin-torque-transfer (SOT-STT) hybrid magnetic device disposed over a substrate, a second SOT-STT hybrid magnetic device disposed over the substrate, and a SOT conductive layer connected to the first and second SOT-STT hybrid magnetic devices. Each of the first and second SOT-STT hybrid magnetic devices includes a first magnetic layer, as a magnetic free layer, a spacer layer disposed under the first magnetic layer, and a second magnetic layer, as a magnetic reference layer, disposed under the spacer layer. The SOT conductive layer is disposed over the first magnetic layer of each of the first and second SOT-STT hybrid magnetic devices.Type: GrantFiled: November 1, 2021Date of Patent: June 6, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Ji-Feng Ying, Jhong-Sheng Wang, Tsann Lin
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Patent number: 11631796Abstract: Operations for integrating thermoelectric devices in Fin FET technology may be implemented in a semiconductor device having a thermoelectric device. The thermoelectric device includes a substrate and a fin structure disposed on the substrate. The thermoelectric device includes a first connecting layer and a second connecting layer disposed on opposing ends of the fin structure. The thermoelectric device includes a first thermal conductive structure thermally and a second thermal conductive structure thermally coupled to the opposing ends of the fin structure. The fin structure may be configured to transfer heat from one of the first thermal conductive structure or the second thermal conductive structure to the other thermal conductive structure based on a direction of current flow through the fin structure. In this regard, the current flow may be adjusted by a power circuit electrically coupled to the thermoelectric device.Type: GrantFiled: July 26, 2022Date of Patent: April 18, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Jhong-Sheng Wang, Jiaw-Ren Shih, Hsiao-Hsuan Hsu
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Patent number: 11616124Abstract: A method of making a semiconductor device includes defining a first fin structure over a major surface of a substrate, wherein the first fin includes a first material. The method includes defining a second fin structure over the major surface of the substrate. Defining the second fin structure includes forming a lower portion of the second fin structure, closest to the substrate, having the first material, and forming an upper portion of the second fin structure, farthest from the substrate, having a second material different from the first material. The method includes forming a dielectric material over the substrate and between the first and second fin structures. The method includes removing the upper portion of the second fin structure, wherein removing the upper portion of the second fin structure includes reducing a height of the second fin structure to be less than a height of the first fin structure.Type: GrantFiled: March 19, 2021Date of Patent: March 28, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Jhong-Sheng Wang, Jiaw-Ren Shih, Chun-Wei Chang, Sheng-Feng Liu
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Publication number: 20220376159Abstract: Operations for integrating thermoelectric devices in Fin FET technology may be implemented in a semiconductor device having a thermoelectric device. The thermoelectric device includes a substrate and a fin structure disposed on the substrate. The thermoelectric device includes a first connecting layer and a second connecting layer disposed on opposing ends of the fin structure. The thermoelectric device includes a first thermal conductive structure thermally and a second thermal conductive structure thermally coupled to the opposing ends of the fin structure. The fin structure may be configured to transfer heat from one of the first thermal conductive structure or the second thermal conductive structure to the other thermal conductive structure based on a direction of current flow through the fin structure. In this regard, the current flow may be adjusted by a power circuit electrically coupled to the thermoelectric device.Type: ApplicationFiled: July 26, 2022Publication date: November 24, 2022Inventors: Jhong-Sheng WANG, Jiaw-Ren SHIH, Hsiao-Hsuan HSU
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Patent number: 11424399Abstract: Operations for integrating thermoelectric devices in Fin FET technology may be implemented in a semiconductor device having a thermoelectric device. The thermoelectric device includes a substrate and a fin structure disposed on the substrate. The thermoelectric device includes a first connecting layer and a second connecting layer disposed on opposing ends of the fin structure. The thermoelectric device includes a first thermal conductive structure thermally and a second thermal conductive structure thermally coupled to the opposing ends of the fin structure. The fin structure may be configured to transfer heat from one of the first thermal conductive structure or the second thermal conductive structure to the other thermal conductive structure based on a direction of current flow through the fin structure. In this regard, the current flow may be adjusted by a power circuit electrically coupled to the thermoelectric device.Type: GrantFiled: July 7, 2015Date of Patent: August 23, 2022Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Jhong-Sheng Wang, Jiaw-Ren Shih, Hsiao-Hsuan Hsu
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Publication number: 20220216269Abstract: A memory device including bit lines, auxiliary lines, selectors, and memory cells is provided. The word lines are intersected with the bit lines. The auxiliary lines are disposed between the word lines and the of bit lines. The selectors are inserted between the bit lines and the auxiliary lines. The memory cells are inserted between the word lines and the auxiliary lines.Type: ApplicationFiled: March 24, 2022Publication date: July 7, 2022Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Ji-Feng Ying, Jhong-Sheng Wang, Tsann Lin
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Publication number: 20220157360Abstract: A method of manufacturing an array of magnetic random access memory cells includes writing to a magnetic random access memory cell. The writing to a memory cell includes determining an optimum write current for the array of memory cells, and applying the optimum write current to a first memory cell in the array. A first read current is applied to the first memory cell to determine whether a magnetic orientation of the first memory cell has changed in response to applying the optimum write current. A second write current is applied to the first memory cell when the magnetic orientation of the first memory cell has not changed. The second write current is different from the optimum write current. A second read current is applied to the first memory cell to determine whether the magnetic orientation of the first memory cell changed in response to applying the second write current.Type: ApplicationFiled: January 31, 2022Publication date: May 19, 2022Inventors: Ji-Feng YING, Jhong-Sheng WANG, Baohua NIU
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Patent number: 11289538Abstract: A memory device including bit lines, auxiliary lines, selectors, and memory cells is provided. The word lines are intersected with the bit lines. The auxiliary lines are disposed between the word lines and the of bit lines. The selectors are inserted between the bit lines and the auxiliary lines. The memory cells are inserted between the word lines and the auxiliary lines.Type: GrantFiled: January 9, 2020Date of Patent: March 29, 2022Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Ji-Feng Ying, Jhong-Sheng Wang, Tsann Lin
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Publication number: 20220052254Abstract: A magnetic memory includes a first spin-orbital-transfer-spin-torque-transfer (SOT-STT) hybrid magnetic device disposed over a substrate, a second SOT-STT hybrid magnetic device disposed over the substrate, and a SOT conductive layer connected to the first and second SOT-STT hybrid magnetic devices. Each of the first and second SOT-STT hybrid magnetic devices includes a first magnetic layer, as a magnetic free layer, a spacer layer disposed under the first magnetic layer, and a second magnetic layer, as a magnetic reference layer, disposed under the spacer layer. The SOT conductive layer is disposed over the first magnetic layer of each of the first and second SOT-STT hybrid magnetic devices.Type: ApplicationFiled: November 1, 2021Publication date: February 17, 2022Inventors: Ji-Feng YING, Jhong-Sheng WANG, Tsann LIN
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Patent number: 11244714Abstract: A method of writing to a magnetic random access memory cell includes applying an alternating current signal to the magnetic random access memory cell having a first magnetic orientation, and applying a direct current pulse to the magnetic random access memory cell to change the magnetic orientation of the magnetic random access memory cell from the first magnetic orientation to a second magnetic orientation. The first magnetic orientation and the second magnetic orientation are different.Type: GrantFiled: February 8, 2021Date of Patent: February 8, 2022Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Ji-Feng Ying, Jhong-Sheng Wang, Duen-Huei Hou
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Patent number: 11238911Abstract: A method of manufacturing an array of magnetic random access memory cells includes writing to a magnetic random access memory cell. The writing to a memory cell includes determining an optimum write current for the array of memory cells, and applying the optimum write current to a first memory cell in the array. A first read current is applied to the first memory cell to determine whether a magnetic orientation of the first memory cell has changed in response to applying the optimum write current. A second write current is applied to the first memory cell when the magnetic orientation of the first memory cell has not changed. The second write current is different from the optimum write current. A second read current is applied to the first memory cell to determine whether the magnetic orientation of the first memory cell changed in response to applying the second write current.Type: GrantFiled: June 15, 2020Date of Patent: February 1, 2022Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Ji-Feng Ying, Jhong-Sheng Wang, Baohua Niu
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Publication number: 20210376085Abstract: A semiconductor device includes a substrate having a major surface. The semiconductor device includes a dielectric material having a uniform thickness on the major surface of the substrate. The semiconductor device includes a first plurality of fins extending from the major surface of the substrate, wherein each fin of the first plurality of fins has a first height from the major surface of the substrate. The semiconductor device includes a second plurality of fins extending from the major surface of the substrate, wherein a first fin of the second plurality of fins is on a first side of the first plurality of fins, a second fin of the second plurality of fins is on a second side of the first plurality of fins opposite the first side, each fin of the second plurality of fins has a second height different from the first height.Type: ApplicationFiled: August 5, 2021Publication date: December 2, 2021Inventors: Jhong-Sheng WANG, Jiaw-Ren SHIH, Chun-Wei CHANG, Sheng-Feng LIU
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Patent number: 11165012Abstract: A magnetic memory including a first spin-orbital-transfer-spin-torque-transfer (SOT-SIT) hybrid magnetic device disposed over a substrate, a second SOT-STT hybrid magnetic device disposed over the substrate, and a SOT conductive layer connected to the first and second SOT-STT hybrid magnetic devices. Each of the first and second SOT-STT hybrid magnetic devices includes a first magnetic layer, as a magnetic free layer, a spacer layer disposed under the first magnetic layer, and a second magnetic layer, as a magnetic reference layer, disposed under the spacer layer. The SOT conductive layer is disposed over the first magnetic layer of each of the first and second SOT-STT hybrid magnetic devices.Type: GrantFiled: October 3, 2019Date of Patent: November 2, 2021Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Ji-Feng Ying, Jhong-Sheng Wang, Tsann Lin
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Patent number: 11107889Abstract: A semiconductor device including a substrate having a major surface. The semiconductor device further includes a dielectric material on the major surface of the substrate. The semiconductor device further includes a first plurality of fins extending from the major surface of the substrate, wherein the dielectric material surrounding each fin of the first plurality of fins has a first thickness. The semiconductor device further includes a second plurality of fins extending from the major surface of the substrate, wherein a first fin of the second plurality of fins is on a first side of the first plurality of fins, a second fin of the second plurality of fins is on a second side of the first plurality of fins opposite the first side, the dielectric material surround each fin of the second plurality of fins has a second thickness, and the second thickness is different from the first thickness.Type: GrantFiled: July 23, 2018Date of Patent: August 31, 2021Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Jhong-Sheng Wang, Jiaw-Ren Shih, Chun-Wei Chang, Sheng-Feng Liu
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Publication number: 20210241809Abstract: A method of writing to a magnetic random access memory cell includes applying an alternating current signal to the magnetic random access memory cell having a first magnetic orientation, and applying a direct current pulse to the magnetic random access memory cell to change the magnetic orientation of the magnetic random access memory cell from the first magnetic orientation to a second magnetic orientation. The first magnetic orientation and the second magnetic orientation are different.Type: ApplicationFiled: February 8, 2021Publication date: August 5, 2021Inventors: Ji-Feng YING, Jhong-Sheng WANG, Duen-Huei HOU