Patents by Inventor Ji-Hyun Jeong

Ji-Hyun Jeong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100159675
    Abstract: A method of fabricating a nonvolatile memory device includes; forming a first sacrificial layer pattern including a first open area that extends in a first direction on a lower dielectric layer, forming a pre-lower dielectric layer pattern including a recess that extends in the first direction using the first sacrificial layer pattern, forming a second sacrificial layer pattern including a second open area that extends in a second direction on the pre-lower dielectric layer pattern and the first sacrificial layer pattern, wherein the second open area intersects the first open area, forming a lower dielectric layer pattern including contact holes spaced apart in the recess using the first sacrificial layer pattern and second sacrificial layer pattern, wherein the contact holes extend to a bottom of the lower dielectric layer pattern, and forming a bottom electrode in the contact hole.
    Type: Application
    Filed: December 22, 2009
    Publication date: June 24, 2010
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Ji-Hyun JEONG, Jae-Hee OH, Jae-Hyun PARK
  • Publication number: 20100108971
    Abstract: Methods of forming integrated circuit devices include forming an etch stop layer on a surface of a semiconductor substrate and forming a first interlayer insulating layer on the etch stop layer. The first interlayer insulating layer is patterned to define an opening therein that exposes a first portion of the etch stop layer. This first portion of the etch stop layer is then removed to thereby expose an underlying portion of the surface of the semiconductor substrate. This removal of the etch stop layer may be performed by wet etching the first portion of the etch stop layer using a phosphoric acid solution. A semiconductor region is then selectively grown into the opening, using the exposed portion of the surface of the semiconductor substrate as an epitaxial seed layer.
    Type: Application
    Filed: July 7, 2009
    Publication date: May 6, 2010
    Inventors: Kong-Soo Lee, Kyoung-Seok Kim, Sang-Jin Park, Chang-Hoon Lee, Ji-Hyun Jeong, Jae-Hyun Park, Jae-Hee Oh