Abstract: An array substrate and a display apparatus including the array substrate are provided. The array substrate includes a substrate divided into a display area and a peripheral area adjacent to the display area. A pixel array is formed on the substrate corresponding to the display area and receives a driving signal. A driving circuit includes a plurality of stages and is formed on the substrate corresponding to the peripheral area. Each of the stages includes a first transistor having a source electrode connected to an output terminal to output the driving signal, a channel layer formed between a gate insulating layer and the source electrode, the channel layer having an opening to facilitate contact between a portion of the gate insulating layer and the source electrode, and a capacitor defined by a gate electrode of the first transistor, the source electrode, and the gate insulating layer contacting the source electrode.

Abstract: A driver chip for controlling a high-resolution display panel is presented. The driver chip is not much larger than a conventional driver chip that is currently used for lower resolution display panels. The driver chip applies data signals to the data lines of the display panel and gate control signals to a gate driver that is formed in the peripheral region of the display panel. The gate driver, which may be made of amorphous silicon TFTs, generates gate signals in response to the gate control signals from the driver chip and applies the gate signals to gate lines. Since the driver chip of the invention controls more gate lines and data lines than a conventional chip of about the same size, the driver chip may be easily adapted for display devices having multiple panels. Where multiple panels are used, the panels may be scanned simultaneously or sequentially.

Abstract: A TFT array panel and a manufacturing method thereof. The TFT array panel includes an insulation substrate, a plurality of gate lines, a plurality of first dummy wiring lines, a gate insulating layer, and a plurality of data lines. The insulation substrate has a display area for displaying an image and a peripheral area outside the display area. The plurality of gate lines are formed in the display area and in a portion of the peripheral area. The plurality of first dummy wiring lines are insulated from the gate lines and formed in the peripheral area. The gate insulating later is formed on the gate lines and the first dummy wiring lines, and has at least one contact hole exposing at least lateral end portions of the first dummy wiring lines.

Abstract: A gate driving circuit includes a first shift register and a second shift register for driving odd gate lines. The first shift register includes a first plurality of cascade-connected stages that sequentially output a plurality of first gate signals. A first stage of the first shift register receives a first vertical start signal. The second shift register includes a second plurality of cascade-connected stages to sequentially output a plurality of second gate signals. The first stage of the second shift register receives an output signal of the first stage of the first shift register as its vertical start signal. A data charging rate may be improved by ensuring the timing margin of each gate signal, so that the driving reliability of the gate driving circuit may be improved.

Abstract: An array substrate and a display apparatus including the array substrate are provided. The array substrate includes a substrate divided into a display area and a peripheral area adjacent to the display area. A pixel array is formed on the substrate corresponding to the display area and receives a driving signal. A driving circuit includes a plurality of stages and is formed on the substrate corresponding to the peripheral area. Each of the stages includes a first transistor having a source electrode connected to an output terminal to output the driving signal, a channel layer formed between a gate insulating layer and the source electrode, the channel layer having an opening to facilitate contact between a portion of the gate insulating layer and the source electrode, and a capacitor defined by a gate electrode of the first transistor, the source electrode, and the gate insulating layer contacting the source electrode.

Abstract: An array substrate and a display apparatus including the array substrate are provided. The array substrate includes a substrate divided into a display area and a peripheral area adjacent to the display area. A pixel array is formed on the substrate corresponding to the display area and receives a driving signal. A driving circuit includes a plurality of stages and is formed on the substrate corresponding to the peripheral area. Each of the stages includes a first transistor having a source electrode connected to an output terminal to output the driving signal, a channel layer formed between a gate insulating layer and the source electrode, the channel layer having an opening to facilitate contact between a portion of the gate insulating layer and the source electrode, and a capacitor defined by a gate electrode of the first transistor, the source electrode, and the gate insulating layer contacting the source electrode.

Abstract: The embodiment is to provide a liquid crystal display device capable of detecting malfunctions. The liquid crystal display device includes pixels configured to be connected to scan lines and data lines, data pads electrically connected to the data lines, a data integrated circuit supplying data signals to the data lines through the data pads, first data transistors coupled to the data pads, and second data transistors coupled to the data lines. The first data transistors are disposed on the data integrated circuit and the second data transistors are separated from the data integrated circuit.

Abstract: The embodiment is to provide a liquid crystal display device capable of detecting malfunctions. The liquid crystal display device includes pixels configured to be connected to scan lines and data lines, data pads electrically connected to the data lines, a data integrated circuit supplying data signals to the data lines through the data pads, first data transistors coupled to the data pads, and second data transistors coupled to the data lines. The first data transistors are disposed on the data integrated circuit and the second data transistors are separated from the data integrated circuit.

Abstract: A display substrate includes a pixel, first, second and third gate lines, and a source line. The pixel includes first, second and third unit pixels, each generating a different color. The first, second and third gate lines are electrically connected to respective ones of the first, second and third unit pixels. The source line is electrically connected to each of the first, second and third unit pixels. Each of the first, second and third unit pixels includes a common electrode and a respective pixel electrode. The common electrode is formed on a substrate. The pixel electrodes are disposed over the common electrode such that the pixel electrode face the common electrode. Each of the pixel electrodes has a plurality of openings therethrough. This arrangement results in a wider display viewing angle and a reduction in the required number of source driver chips.

Abstract: A liquid crystal display (LCD) device is disclosed. The LCD device includes a noise removal unit configured to reduce noise coupled to the data lines.

Abstract: A TFT array panel and a manufacturing method thereof. The TFT array panel includes an insulation substrate, a plurality of gate lines, a plurality of first dummy wiring lines, a gate insulating layer, and a plurality of data lines. The insulation substrate has a display area for displaying an image and a peripheral area outside the display area. The plurality of gate lines are formed in the display area and in a portion of the peripheral area. The plurality of first dummy wiring lines are insulated from the gate lines and formed in the peripheral area. The gate insulating later is formed on the gate lines and the first dummy wiring lines, and has at least one contact hole exposing at least lateral end portions of the first dummy wiring lines.

Abstract: A TFT array panel and a manufacturing method thereof, The TFT array panel includes an insulation substrate, a plurality of gate lines, a plurality of first dummy wiring lines, a gate insulating layer, and a plurality of data lines. The insulation substrate has a display area for displaying an image and a peripheral area outside the display area. The plurality of gate lines are formed in the display area and in a portion of the peripheral area. The plurality of first dummy wiring lines are insulated from the gate lines and formed in the peripheral area. The gate insulating later is formed on the gate lines and the first dummy wiring lines, and has at least one contact hole exposing at least lateral end portions of the first dummy wiring lines.

Abstract: An array substrate includes a base substrate, a dummy circuit section, a dummy pixel portion, an extended line, a common voltage line, and an overlap portion. Pixel portions are formed in a display area. The dummy circuit section is formed in a peripheral area to protect the pixel portions from static electricity. The dummy pixel portion is adjacent to the dummy circuit section. The dummy circuit section is in an electrically floating state. The extended line is extended from the dummy circuit section and electrically open with respect to the dummy pixel portion. The common voltage line is overlapped with the extended line of the dummy circuit section, the extended line being electrically open with respect to the display area, and thus the display area may be protected from the static electricity which flows into the dummy circuit section.

Abstract: A thin film transistor array panel including a substrate, a plurality of first signal lines formed on the substrate, a plurality of second signal lines, insulated from the first signal lines, which are formed on the substrate and which define an area of a display area by traversing the first signal lines, a driver disposed on a peripheral area, a plurality of connection lines, disposed on the peripheral area, which couple the driver to each of the first signal lines, and an insulating layer which insulate the first signal lines from the connection lines. The insulating layer includes a plurality of contact holes, portions of the first signal lines and the connection lines are connected through the contact holes, and sizes of exposed portions of the first signal lines exposed through the contact holes increase as respective distances from the contact holes to the driver increase.

Abstract: A gate driving circuit includes a first shift register and a second shift register for driving odd gate lines. The first shift register includes a first plurality of cascade-connected stages that sequentially output a plurality of first gate signals. A first stage of the first shift register receives a first vertical start signal. The second shift register includes a second plurality of cascade-connected stages to sequentially output a plurality of second gate signals. The first stage of the second shift register receives an output signal of the first stage of the first shift register as its vertical start signal. A data charging rate may be improved by ensuring the timing margin of each gate signal, so that the driving reliability of the gate driving circuit may be improved.

Abstract: An image display device includes a driving unit to provide first and second image signals and first and second control signals to display images, a first display unit to display first images in response to the first image signal and the first control signal from the driving unit, a second display unit to display secondary images in response to the second image signal and the second control signal from the driving unit, first data-transfer lines to transfer the second image signal from the driving unit to the second display unit, second data-transfer lines to transfer the second control signal from the driving unit to the second display unit, and a flexible printed circuit board connected between the first and second display units to provide electrical connection between the driving unit and the second display unit.

Abstract: A display substrate includes a pixel, first, second and third gate lines, and a source line. The pixel includes first, second and third unit pixels, each generating a different color. The first, second and third gate lines are electrically connected to respective ones of the first, second and third unit pixels. The source line is electrically connected to each of the first, second and third unit pixels. Each of the first, second and third unit pixels includes a common electrode and a respective pixel electrode. The common electrode is formed on a substrate. The pixel electrodes are disposed over the common electrode such that the pixel electrode face the common electrode. Each of the pixel electrodes has a plurality of openings therethrough. This arrangement results in a wider display viewing angle and a reduction in the required number of source driver chips.

Abstract: A thin film transistor array panel including a substrate, a plurality of first signal lines formed on the substrate, a plurality of second signal lines, insulated from the first signal lines, which are formed on the substrate and which define an area of a display area by traversing the first signal lines, a driver disposed on a peripheral area, a plurality of connection lines, disposed on the peripheral area, which couple the driver to each of the first signal lines, and an insulating layer which insulate the first signal lines from the connection lines. The insulating layer includes a plurality of contact holes, portions of the first signal lines and the connection lines are connected through the contact holes, and sizes of exposed portions of the first signal lines exposed through the contact holes increase as respective distances from the contact holes to the driver increase.

Abstract: A driver chip for controlling a high-resolution display panel is presented. The driver chip is not much larger than a conventional driver chip that is currently used for lower resolution display panels. The driver chip applies data signals to the data lines of the display panel and gate control signals to a gate driver that is formed in the peripheral region of the display panel. The gate driver, which may be made of amorphous silicon TFTs, generates gate signals in response to the gate control signals from the driver chip and applies the gate signals to gate lines. Since the driver chip of the invention controls more gate lines and data lines than a conventional chip of about the same size, the driver chip may be easily adapted for display devices having multiple panels. Where multiple panels are used, the panels may be scanned simultaneously or sequentially.

Abstract: A TFT array panel and a manufacturing method thereof, The TFT array panel includes an insulation substrate, a plurality of gate lines, a plurality of first dummy wiring lines, a gate insulating layer, and a plurality of data lines. The insulation substrate has a display area for displaying an image and a peripheral area outside the display area. The plurality of gate lines are formed in the display area and in a portion of the peripheral area. The plurality of first dummy wiring lines are insulated from the gate lines and formed in the peripheral area. The gate insulating later is formed on the gate lines and the first dummy wiring lines, and has at least one contact hole exposing at least lateral end portions of the first dummy wiring lines.