Abstract: This disclosure relates to a stretchable composite electrode and a fabricating method thereof, and particularly relates to a stretchable composite electrode including a silver nanowire layer and a flexible polymer film and a fabricating method thereof.

Abstract: A method and apparatus for adjusting exhaust flow, and the apparatus has a programmable exhaust control regulator generating a first input signal to a motor control circuit, an exhaust flow meter generating a second input signal to the motor control circuit and a motor driven control valve moved to different positions according to the first and second input signals, the control valve being installed in an exhaust portion of the hot plate apparatus.

Abstract: A method and apparatus for adjusting exhaust flow, and the apparatus has a programmable exhaust control regulator generating a first input signal to a motor control circuit, an exhaust flow meter generating a second input signal to the motor control circuit and a motor driven control valve moved to different positions according to the first and second input signals, the control valve being installed in an exhaust portion of the hot plate apparatus.

Abstract: The present invention provides a method of forming a thin-film resistor on a dielectric layer of a semiconductor wafer. First, a resistance layer, a buffering layer and a protective layer are formed in a predetermined area of the dielectric layer. Then, an insulating layer is formed on the semiconductor wafer to cover the upper and side surface of the protective layer, the side surface of the buffering layer and the resistance layer, and the surface of the dielectric layer outside of the predetermined area. Next, two openings extending down to the protective layer are formed by performing a dry-etching process on the insulating layer. Later, two openings extending down to the buffering layer are formed by performing a first wet-etching process on the protective layer below the two openings of the insulating layer. Next, two openings extending down to the resistance layer are formed by performing a second wet-etching process on the buffering layer below the two openings of the protective layer.

Abstract: A resistance layer, a buffering layer and a protective layer are formed in a predetermined area of a dielectric layer. An insulating layer is formed on the semiconductor wafer to cover the upper and side surfaces of the protective layer, the side surfaces of the buffering layer and the resistance layer, and the surface of the dielectric layer outside of the predetermined area. Two openings extending down to the protective layer are formed by performing a dry-etching process on the insulating layer. Two openings extending down to the buffering layer are formed by performing a first wet-etching process on the protective layer below the two openings of the insulating layer. Two openings extending down to the resistance layer are formed by performing a second wet-etching process on the buffering layer below the two openings of the protective layer.

Abstract: A thin-film resistor structure is disclosed. A resistor island is formed comprising of a resistor layer positioned on a dielectric layer, a protective layer laminated on the resistor layer, and a wet etch mask formed over the protective layer. Two dry-etched openings are fabricated in the wet etch mask, each over a respective end of the resistor layer. The two openings range vertically through the wet etch mask down to the surface of the underlying protective layer. Through the two openings, two self-aligned wet-etched vias are then formed within the protective layer, each atop a respective end of the resistor layer. The two self-aligned wet-etched vias are used to accommodate contact plugs.

Abstract: The present invention provides a method of forming a thin-film resistor positioned on a semiconductor wafer. The method comprises forming a resistance layer and an insulating layer in a predetermined area of the dielectric layer, the insulating layer being positioned on the resistance layer; performing a first etching process to remove the insulating layer on two ends of the resistance layer to form two openings; forming a conductive layer on the insulating layer and filling the two openings, the conductive layer being electrically linked with the two ends of the resistance layer from the two openings; and performing a second etching process to remove the conductive layer outside the resistance layer and partial conductive layer on the insulating layer to form two disconnected conductive layers, the two openings being separately positioned below the two disconnected conductive layers.

Abstract: A resistance layer, a buffering layer and a protective layer are formed in a predetermined area of a dielectric layer. An insulating layer is formed on the semiconductor wafer to cover the upper and side surfaces of the protective layer, the side surfaces of the buffering layer and the resistance layer, and the surface of the dielectric layer outside of the predetermined area. Two openings extending down to the protective layer are formed by performing a dry-etching process on the insulating layer. Two openings extending down to the buffering layer are formed by performing a first wet-etching process on the protective layer below the two openings of the insulating layer. Two openings extending down to the resistance layer are formed by performing a second wet-etching process on the buffering layer below the two openings of the protective layer.

Abstract: A method for fabricating a thin film resistor is provided. The method contains forming a patterned conductive layer on a dielectric layer, which is formed over a substrate having a semiconductor device. The patterned conductive layer has a first opening to expose a portion of the substrate. An insulating layer is formed over the substrate and is planarized, in which the first opening is filled by the insulating layer. Patterning the insulating layer forms a second opening that exposes the first opening and a portion of the patterned conductive layer at a place, where a thin film resistor is desired to be formed. A thin film resistor conformal to the second opening is formed over the dielectric layer to at least cover the opening.

Abstract: A clipped thin-film resistor with an out-gassing preventing layer formed on a dielectric layer of a semiconductor substrate, and an isolated resistor layer interposed between the underlying out-gassing preventing layer and an overlying protective layer is provided to electrically connect with a semiconductor device fabricated on the semiconductor substrate. Two tungsten plugs, electrically connecting a metal wire with the isolated resistor layer, are positioned atop two respective ends of the resistor layer. Each tungsten plug first fills a self-aligned wet etched via formed within the protective layer atop two respective ends of the resistor layer and then etched back. The protective layer serves to protect the resistor layer from damage during the formation of the via.

Abstract: A thin-film resistor has: 1. a resistance layer positioned on a dielectric layer, 2. a protective layer positioned on the resistance layer and having two openings on two ends of the resistance layer, 3. an insulating layer covering the upper and side surfaces of the protective layer, the side surfaces of the resistance layer, and the surface of the dielectric layer, the protective layer having two openings above the two openings of the protective layer, 4. two plugs positioned in the two openings of the insulating layer and the protective layer for electrically connecting to the two ends of the resistance layer, and 5. two conductive layers formed on the insulting layer and positioned on the two plugs, and which are used as two electrical wires for electrically connecting to the two ends of the resistance layer.

Abstract: A method for forming a thin-film resistor includes forming two insulators on the thin-film resistor, forming contact holes by performing wet etching processes, and forming interconnect and contact plugs at the same time. The invention also provides another method for forming a thin-film resistor that forms a thin-film resistor over the passivation layer instead. That is, forming a thin-film resistor on the top of the device, so that the resistance can be re-modified according to the actual needs.

Abstract: A method of fabricating thin film transistor. A thin oxide layer is formed as a protection layer for a thin film transistor. Since the oxide layer does not affect the fabrication process of a barrier layer, the thin oxide layer can be formed as the protection layer to protect the thin-film resist layer formed subsequently from being damaged by ions produced during dry etching process.

Abstract: The present invention provides a method of forming a thin-film resistor with a stable electric resistance on a dielectric layer of a semiconductor wafer. The method involves: 1. forming a resistance layer and a protective layer in a predetermined area of the dielectric layer, the protective layer being positioned on the resistance layer, 2. forming an insulating layer on the upper and side surfaces of the protective layer and the side surface of the resistance layer in the predetermined area, and on the surface of the dielectric layer outside the predetermined area, 3. performing a dry-etching process on the insulating layer within the predetermined area to form two openings extending down to the protective layer, the protective layer being used for preventing the resistance layer from plasma damage caused by the dry-etching process, 4. performing a wet-etching process on the protective layer through the two openings of the insulating layer to form two openings extending down to the resistance layer, 5.

Abstract: A dual damascene method is described for manufacturing a multilevel metal interconnect with a thin film resistor. A substrate is provided. An insulating layer is formed on the substrate. A dual damascene structure is formed in the insulating layer. A thin film resistor layer is formed over the substrate and the thin film resistor layer is patterned to form a thin film resistor.

Abstract: The present invention provides a thin-film resistor positioned on a semiconductor wafer and its method of formation. The thin-film resistor comprises a dielectric layer, a resistance layer, a protective layer, an insulating layer and two conductive layers. The dielectric layer is positioned on the semiconductor wafer. The resistance layer is positioned in a predetermined area of the dielectric layer. The protective layer positioned on the resistance layer comprises two openings formed above two ends of the resistance layer by using the wet-etching process. The insulating layer positioned on the protective layer comprises two openings on the two openings of the protective layer by using the dry-etching process. The two conductive layers are separately positioned in the two openings of the protective layer and the insulating layer to connect two ends of the resistance layer and function as two electrical terminals.

Abstract: A method for forming thin film resistor with tungsten plug is disclosed. The Method includes the following steps. This method comprises firstly providing a semiconductor device with contact regions wherein a metal barrier layer is formed on top surface of the device. Then forming tungsten layer on the inter-layer dielectric and etching back are carried out until stopping on the barrier metal. Consequentially an inter-layer dielectric is formed on top of said surface of semiconductor device. The next, band layer is formed on the inter-layer dielectric. Nitride layer will be deposited onto said thin film resistor. Portions of said nitride layer and the inter-layer dielectric are all removed. The band layer is patterned to define as contact plug. Forming the inter-layer dielectric over top surface of semiconductor device is achieved. Sequentially anisotropically etching back the inter-layer dielectric to form contact plug. Simultaneously, anisotropically etching back the silicon nitride layer.

Abstract: A stacked semiconductor structure is designed for component arrangement of an IC (integrated circuit) device having a large number of various types of junction devices, such as diodes, well resistors, N.sup.+ resistors, and BJTs (bipolar junction transistors) and MOS (metal-oxide semiconductor) transistors. The stacked semiconductor structure is constructed on an SOI (silicon-on-insulator) structure which includes a semiconductor substrate; a buried insulator layer formed over the substrate; and a silicon film formed over the buried insulator layer. Based on this SOI structure, the various types of junction devices are arranged in the substrate beneath the buried insulator layer; while the MOS transistors are arranged in the silicon film above the buried insulator layer, with the silicon film further being further formed with a plurality of trenches for isolating the MOS transistors from each other.

Abstract: A photo diode is provided, which can polarize incident light before the light is sensed by the light-sensitive area of the photo diode so that the photo diode is capable of detecting the intensity of the light that is polarized in a specific direction. The photo diode includes a light-sensitive structure which can be a conventional photo diode, and at least one conductive grating formed over the light-sensitive structure, with the conductive grating having a plurality of substantially parallel and equally spaced conductive strips formed from a conductive material. The conductive grating can attenuate the intensity of the light that is polarized in parallel to the conductive grating before the light is sensed by the light-sensitive structure, thereby allowing only those components that are polarized in the direction perpendicular to the conductive grating to pass therethrough. The photo diode is therefore capable of detecting the intensity of the light that is polarized in a specific direction.

Abstract: A method of manufacturing a thin film resistor layer. A first insulating layer is formed on a substrate, wherein the substrate has at least a device previously formed therein. A thin film resistor layer is formed on the first insulating layer. A second insulating layer is formed on the thin film resistor layer. The second insulating layer and the thin film resistor layer are patterned. A third insulating layer is formed on the first insulating layer and the patterned second insulating layer. An anisotropic etching step is performed to form a first opening penetrating through the third and the first insulating layers and to form a second and a third openings penetrating through the third insulating layer, simultaneously. A self-aligned etching step is performed to expose a portion of the thin film resistor layer through the second and the third openings. The second and the third openings are filled with a conductive material to form interconnects on the third insulating layer.