Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a first transparent substrate, a conductive layer, an insulating protective layer, a second transparent substrate, a device substrate, and a bonding layer. The first transparent substrate has a first surface and an opposite second surface. The conductive layer is disposed on the second surface of the first transparent substrate. The insulating protective layer covers the conductive layer and the first transparent substrate. The second transparent substrate is disposed above the first transparent substrate, and has a first surface facing the first transparent substrate and an opposite second surface. The device substrate is disposed on the second surface of the second transparent substrate. The bonding layer is bonded to the insulating protective layer and the first surface of the second transparent substrate.

Abstract: An apparatus and system having both PCI Root Port (RP) device and Direct Memory Access (DMA) End Point device functionality is disclosed. The apparatus is for use in an input/output (I/O) system interconnect module (IOSIM) device. A DMA/RP module includes a RP portion and one or more DMA/RP portions. The RP portion has one or more queue pipes and is configured to function as a standard PCIe Root Port device. Each of the DMA/RP portions includes DMA engines and DMA input and output channels, and is configured to behave more like an End Point device. The DMA/RP module also includes one or more PCIe hard core portions, an ICAM (I/O Caching Agent Module), and at least one PCIe service block (PSB). *The hard core portion couples the DMA/RP module and IOSIM device to an I/O device via a PCIe link, and the ICAM transitions data to a host memory device operating system.