Patents by Inventor Jiajun Luo

Jiajun Luo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11987868
    Abstract: A method for preparing a rare earth anisotropic bonded magnetic powder, comprises the following steps: (1) preparing raw powder with RTBH as the main component, wherein, R is Nd or Pr/Nd, and T is a transition metal containing Fe; (2) adding La hydride or Ce hydride and copper powder to the raw powder to form a mixture; (3) subjecting the mixture to atmosphere diffusion heat treatment to give the rare earth anisotropic bonded magnetic powder.
    Type: Grant
    Filed: November 5, 2020
    Date of Patent: May 21, 2024
    Assignees: GRIREM ADVANCED MATERIALS CO., LTD., GRIREM HI-TECH CO., LTD.
    Inventors: Yang Luo, Zilong Wang, Yuanfei Yang, Zhou Hu, Dunbo Yu, Jiajun Xie, Yifan Liao, Zhongkai Wang
  • Patent number: 11981983
    Abstract: The invention discloses a composite rare earth anisotropic bonded magnet and a preparation method thereof. The composite rare earth anisotropic bonded magnet comprises a Nd—Fe—B magnetic powder, a Sm—Fe—N magnetic powder, a binder and an inorganic nano-dispersant. The preparation method comprises steps of preparing a Nd—Fe—B magnetic powder by a HDDR method, preparing a Sm—Fe—N magnetic powder by a powder metallurgy method, mixing the Nd—Fe—B magnetic powder, the Sm—Fe—N magnetic powder, the binder and the inorganic nano-dispersant at a specific ratio to finally obtain the composite rare earth anisotropic bonded magnet. The invention, by adding an inorganic nano-dispersant, enables the full dispersion of the fine Sm—Fe—N powder during the mixing process of the binder, the Nd—Fe—B magnetic powder and the Sm—Fe—N powder, and thus makes the fine Sm—Fe—N powder and the binder evenly coated on the surface of the anisotropic Nd—Fe—B magnetic powder.
    Type: Grant
    Filed: November 5, 2020
    Date of Patent: May 14, 2024
    Assignees: GRIREM ADVANCED MATERIALS CO., LTD., GRIREM HI-TECH CO., LTD.
    Inventors: Yang Luo, Zhongkai Wang, Yuanfei Yang, Zilong Wang, Dunbo Yu, Yifan Liao, Jiajun Xie, Zhou Hu
  • Publication number: 20240129758
    Abstract: In the method, an access point AP receives action information separately reported by N stations STAs, where N pieces of action information are used to determine a training result of a first neural network of each STA, and N is a positive integer. The AP determines the training result of the first neural network of each STA based on the N pieces of action information, and sends the training result of the first neural network of each STA to the corresponding STA. The training result of the first neural network of each STA is determined based on the action information reported by the N STAs, instead of only the action information of the STA. This can improve a prediction capability of the first neural network, help improve a capability of each STA to predict channel access behavior of another STA, and improve a system throughput and reduce a communication latency.
    Type: Application
    Filed: December 15, 2023
    Publication date: April 18, 2024
    Inventors: Ziyang GUO, Peng LIU, Jiajun LUO, Xun YANG, Yunbo LI
  • Publication number: 20240080134
    Abstract: A method, circuit, audio playback device, and system of sending and receiving Bluetooth packet loss data is disclosed. The method includes: step S100, receiving a forwarding request sent by a second audio playback device in a receiving state; step S200, monitoring the retransmission information of an audio source device retransmitting current audio data on Link 1 according to the forwarding request; step S300, determining whether the retransmission information is monitored; step S400, switching from the receiving state to a sending state; and step S500, forwarding the current audio data to the second audio playback device through Link 2 in accordance with the time sequence of the audio source device retransmitting the current audio data. The signal can be provided to the second audio playback device from different locations.
    Type: Application
    Filed: November 10, 2023
    Publication date: March 7, 2024
    Inventors: Jiajun Zhu, Haitao Huang, Qiming Zhang, Xiangjun Hu, Guangjun Luo, Ziming Huang, Xin Yu
  • Publication number: 20240027554
    Abstract: A system to improve a product based on a relaxation response includes a memory configured to store relaxation response data of a sample. The relaxation response data includes time data and amplitude data. A processor is operatively coupled to the memory and configured to convert the relaxation response data to linear-amplitude versus log-time data. The processor also performs a least-squares fit of the converted relaxation response data to a heavy-tail function to determine one or more fit parameter values. The processor also updates a design for the sample based at least in part on the one or more fit parameter values.
    Type: Application
    Filed: July 20, 2023
    Publication date: January 25, 2024
    Inventors: Matthew A. Grayson, Jiajun Luo, Can Aygen
  • Publication number: 20230345536
    Abstract: The present disclosure relates to a channel access method and a channel access apparatus. In an example method, a first node obtains network status information in a target period. The network status information includes a first time segment and a second time segment. The first node inputs the network status information into a target neural network, to obtain a first prediction value and a second prediction value. The first node sends a to-be-sent packet to a second node through the shared channel in response to determining that the first prediction value is greater than the second prediction value.
    Type: Application
    Filed: June 27, 2023
    Publication date: October 26, 2023
    Inventors: Peng LIU, Ziyang GUO, Yuchen GUO, Jiajun LUO, Xun YANG
  • Publication number: 20220328275
    Abstract: The present disclosure discloses a power device including at least one vacuum packaged unit structure. The unit structure comprises a silicon substrate (100) and an emitter (200), a light modulator (300) and a collector (400) formed on the silicon substrate (100). On the one hand, the unified silicon-based process is compatible with the existing commercial process, so that it is easy for integration, simple for manufacture, and low in cost; on the other hand, the light modulator (300) is introduced and formed on the silicon substrate by a silicon-based process, which enhances field emission efficiency of the emitter (200), offsets the inconsistency of distances between the tips of the emitters (200) and the collector (400) caused by unevenness of the emitters, and increases the process redundancy of the cold cathode emitter.
    Type: Application
    Filed: January 20, 2021
    Publication date: October 13, 2022
    Applicant: INSTITUTE OF MICROELECTRONICS OF THE CHINESE ACADEMY OF SCIENCES
    Inventors: Fazhan ZHAO, Jianhui BU, Jiajun LUO
  • Publication number: 20220009464
    Abstract: This present disclosure provides a controlling method for an actuator (104), an actuator (104), and an electromechanical brake system of brake technology. The controlling method comprises: receiving a brake demand; controlling an electric motor (108) based on the brake demand; if the brake demand satisfies a preset stationary condition within a preset period, controlling a brake force holding device (108) to lock a shaft. In this way, frequent variations of the brake demand caused by interference from ambient disturbance or the driver's unsteady brake instructions may be prevented so that the actuator can be locked timely, thereby maintaining a continuous brake torque output with low power consumption or zero power consumption to provide a continuous brake force to the vehicle.
    Type: Application
    Filed: September 24, 2021
    Publication date: January 13, 2022
    Inventors: Jiajun Luo, Christian Rylander
  • Patent number: 11046589
    Abstract: The present invention discloses a multi-element perovskite material, and a single crystal, powder and a film thereof, as well as the applications thereof in photoluminescence and electroluminescence, in which the multi-element perovskite material is a multi-element fully-inorganic salt of non-lead metal halide and has a perovskite structure; and the chemical formula of the multi-element perovskite material is Cs2NaxAg1-xInyBi1-yCl6, wherein 0?x?1, 0?y?1. Meanwhile, based on the very strong self-trapped exciton states of the double perovskite, the present invention proposes a high-efficiency single-phase broadband phosphor and an electroluminescent device.
    Type: Grant
    Filed: October 25, 2018
    Date of Patent: June 29, 2021
    Assignee: HUAZHONG UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Jiang Tang, Shunran Li, Guangda Niu, Jiajun Luo, Qingsong Hu, Jing Liu
  • Publication number: 20190330074
    Abstract: The present invention discloses a multi-element perovskite material, and a single crystal, powder and a film thereof, as well as the applications thereof in photoluminescence and electroluminescence, in which the multi-element perovskite material is a multi-element fully-inorganic salt of non-lead metal halide and has a perovskite structure; and the chemical formula of the multi-element perovskite material is Cs2NaxAg1-xInyBi1-yCl6, wherein 0?x?1, 0?y?1. Meanwhile, based on the very strong self-trapped excitors states of the double perovskite, the present invention proposes a high-efficiency single-phase broadband phosphor and an electroluminescent device.
    Type: Application
    Filed: October 25, 2018
    Publication date: October 31, 2019
    Applicant: HUAZHONG UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Jiang Tang, Shunran Li, Guangda Niu, Jiajun Luo, Qingsong Hu, Jing Liu
  • Patent number: 10444187
    Abstract: Systems and methods can provide a fast and accurate way to measure conductivity and Hall effect, such that transient conductivities, transient carrier densities or transient mobilities can be measured on millisecond time scales, for example. The systems and methods can also reduce the minimum magnetic field needed to extract carrier density or mobility of a given sample, and reduce the minimum mobility that can be measured with a given magnetic field.
    Type: Grant
    Filed: August 30, 2017
    Date of Patent: October 15, 2019
    Assignee: Northwestern University
    Inventors: Matthew Grayson, Jiajun Luo
  • Publication number: 20190019905
    Abstract: The present invention discloses a semiconductor radiation detector based on Bi-based quaternary halide single crystal and a manufacturing method, and relates to the technical field of ray imaging detector manufactured by a semiconductor material. The semiconductor radiation detector in this example includes: a light absorption layer made of Bi-based quaternary halide single crystal; an electron selective contact layer and a hole selective contact layer respectively provided on upper and lower sides of the light absorption layer; and two electrodes which are respectively in contact with the two charge selective contact layers and used as positive and negative electrodes of the device. The semiconductor radiation detector in the present invention has advantages such as high sensitivity, good stability and environmental friendliness.
    Type: Application
    Filed: November 24, 2017
    Publication date: January 17, 2019
    Inventors: Jiang TANG, Weicheng PAN, Haodi WU, Jiajun LUO, Guangda NIU, Ying ZHOU
  • Patent number: 10176287
    Abstract: The invention discloses an STI stress effect modeling method and device of an MOS device, and belongs to the technical field of parameter extraction modeling of devices. The method comprises the following steps: introducing the influence of temperature parameters on the STI stress effect of the MOS device, so as to form a function showing that the STI stress effect of the MOS device changes along with the temperature parameters; extracting the model parameter Model1 of the MOS device at normal temperature; on the basis of the Model1, extracting the parameter Model2 that the STI stress affects the properties of the MOS device at normal temperature; and on the basis of the Model2, extracting fitting parameters of the MOS device in the function so as to acquire final model parameters. The device comprises a first module, a second module, a third module and a fourth module.
    Type: Grant
    Filed: April 25, 2014
    Date of Patent: January 8, 2019
    Assignee: The Institute of Microelectronics of Chinese Academy of Science
    Inventors: Jianhui Bu, Shuzhen Li, Jiajun Luo, Zhengsheng Han
  • Publication number: 20180188205
    Abstract: Systems and methods can provide a fast and accurate way to measure conductivity and Hall effect, such that transient conductivities, transient carrier densities or transient mobilities can be measured on millisecond time scales, for example. The systems and methods can also reduce the minimum magnetic field needed to extract carrier density or mobility of a given sample, and reduce the minimum mobility that can be measured with a given magnetic field.
    Type: Application
    Filed: August 30, 2017
    Publication date: July 5, 2018
    Applicant: Northwestern University
    Inventors: Matthew Grayson, Jiajun Luo
  • Patent number: 9626467
    Abstract: The present invention provides a SOI MOS device modeling method. The SOI MOS device is one having a source-drain injection not reaching the bottom. The method comprises: a) establishing an overall model comprising a primary MOS device model simulating an SOI MOS device having the source-drain injection reaching the bottom, a source body PN junction bottom capacitance model simulating a source body PN junction bottom capacitance, and a drain body PN junction bottom capacitance model simulating a drain body PN junction bottom capacitance; and b) extracting parameters respectively for the primary MOS device model, the source body PN junction bottom capacitance model, and the drain body PN junction bottom capacitance model in the overall model. In the prior art, the source body junction bottom capacitance and the drain body junction bottom capacitance in the SOI MOS device having a source-drain injection not reaching the bottom affect the performances of the device.
    Type: Grant
    Filed: September 21, 2012
    Date of Patent: April 18, 2017
    Assignee: Institute of Microelectronics, Chinese Academy of Sciences
    Inventors: Jianhui Bu, Jinshun Bi, Jiajun Luo, Zhengsheng Han
  • Publication number: 20160259876
    Abstract: The invention discloses an STI stress effect modeling method and device of an MOS device, and belongs to the technical field of parameter extraction modeling of devices. The method comprises the following steps: introducing the influence of temperature parameters on the STI stress effect of the MOS device, so as to form a function showing that the STI stress effect of the MOS device changes along with the temperature parameters; extracting the model parameter Model1 of the MOS device at normal temperature; on the basis of the Model1, extracting the parameter Model2 that the STI stress affects the properties of the MOS device at normal temperature; and on the basis of the Model2, extracting fitting parameters of the MOS device in the function so as to acquire final model parameters. The device comprises a first module, a second module, a third module and a fourth module.
    Type: Application
    Filed: April 25, 2014
    Publication date: September 8, 2016
    Inventors: Jianhui Bu, Shuzhen Li, Jiajun Luo, Zhengsheng Han
  • Patent number: 9111995
    Abstract: A method for improving anti-radiation performance of SOI structure that includes implementing particle implantations of high-energy neutrons, protons and ?-rays to a buried oxide layer of an SOI structure, and then performing annealing process. The high-energy particle implantation introduces displacement damage to the buried oxide layer of the SOI structure.
    Type: Grant
    Filed: October 25, 2012
    Date of Patent: August 18, 2015
    Assignee: Institute of Microelectronics, Chinese Academy of Sciences
    Inventors: Yinxue Lv, Jinshun Bi, Jiajun Luo, Zhengsheng Han, Tianchun Ye
  • Publication number: 20150177312
    Abstract: The present invention provides a method for determining PN junction depth comprising: a) measuring a square resistance in a well region; b) forming a junction type field effect transistor in the well region, changing a gate electrode voltage and measuring a source-drain resistance; c) calculating the PN junction depth according to the measured square resistance, source-drain resistance and related process parameters of the junction type field effect transistor. As compared with the prior art, the technical solution in this invention determines the PN junction depth by electrical measurement, is thus simple and feasible, and has better repeatability.
    Type: Application
    Filed: September 21, 2012
    Publication date: June 25, 2015
    Inventors: Jianhui Bu, Jinshun Bi, Jiajun Luo, Zhengsheng Han
  • Publication number: 20150178429
    Abstract: The present invention provides a SOI MOS device modeling method. The SOI MOS device is one having a source-drain injection not reaching the bottom. The method comprises: a) establishing an overall model comprising a primary MOS device model simulating an SOI MOS device having the source-drain injection reaching the bottom, a source body PN junction bottom capacitance model simulating a source body PN junction bottom capacitance, and a drain body PN junction bottom capacitance model simulating a drain body PN junction bottom capacitance; and b) extracting parameters respectively for the primary MOS device model, the source body PN junction bottom capacitance model, and the drain body PN junction bottom capacitance model in the overall model. In the prior art, the source body junction bottom capacitance and the drain body junction bottom capacitance in the SOI MOS device having a source-drain injection not reaching the bottom affect the performances of the device.
    Type: Application
    Filed: September 21, 2012
    Publication date: June 25, 2015
    Inventors: Jianhui Bu, Jinshun Bi, Jiajun Luo, Zhengsheng Han
  • Publication number: 20150170915
    Abstract: The present invention provides a method for manufacturing a semiconductor structure, which is characterized in comprising following steps: providing an SOI substrate for forming a semiconductor structure; the SOI substrate comprises a monocrystalline silicon top layer, a buried oxide layer and a support substrate; and forming an amorphous region outside the area for forming a channel region of the semiconductor structure in the monocrystalline silicon top layer. The method provided by the present invention can effectively improve reliability of a gate dielectric layer formed on the SOI substrate.
    Type: Application
    Filed: September 21, 2012
    Publication date: June 18, 2015
    Applicant: Institute of Microelectroncis, Chinese Academy of Science
    Inventors: Jinshun Bi, Jiajun Luo, Zhengsheng Han