Patents by Inventor Jian-Bo Yang

Jian-Bo Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11187855
    Abstract: An optical cable fixture includes a base and a cover. The base defines a receiving groove penetrating opposite sides of the base. The receiving groove includes a first receiving portion and a second receiving portion. The first receiving portion receives an optical cable. The second receiving portion receives first optical fibers extending from the optical cable. The cover covers the base and fixes the optical cable and the first optical fibers.
    Type: Grant
    Filed: June 3, 2020
    Date of Patent: November 30, 2021
    Assignee: Fujin Precision Industrial (Jincheng)Co., Ltd.
    Inventors: Jian-Wei Hu, Yao Li, Jian-Bo Yang
  • Publication number: 20210356668
    Abstract: An optical cable fixture includes a base and a cover. The base defines a receiving groove penetrating opposite sides of the base. The receiving groove includes a first receiving portion and a second receiving portion. The first receiving portion receives an optical cable. The second receiving portion receives first optical fibers extending from the optical cable. The cover covers the base and fixes the optical cable and the first optical fibers.
    Type: Application
    Filed: June 3, 2020
    Publication date: November 18, 2021
    Inventors: JIAN-WEI HU, YAO LI, JIAN-BO YANG
  • Patent number: 9076735
    Abstract: Methods for fabricating integrated circuits are disclosed. In an exemplary embodiment, a method for fabricating an integrated circuit includes forming a silicon material layer over a semiconductor substrate. The semiconductor substrate includes a logic device region and a memory array region. The memory array region has a memory device formed on the semiconductor substrate. The method further includes forming a capping layer over the silicon material layer and over the memory device and removing the capping layer from over the memory device in the memory array region using a first chemical mechanical polishing process while leaving at least a first portion of the capping layer in place over the logic device region. Further, the method includes removing the first the silicon material layer from over the memory device in the memory array region using a second chemical mechanical polishing process.
    Type: Grant
    Filed: November 27, 2013
    Date of Patent: July 7, 2015
    Assignee: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
    Inventors: Lup San Leong, Alan Cing Gie Lim, Ling Wu, Jian Bo Yang
  • Publication number: 20150147872
    Abstract: Methods for fabricating integrated circuits are disclosed. In an exemplary embodiment, a method for fabricating an integrated circuit includes forming a silicon material layer over a semiconductor substrate. The semiconductor substrate includes a logic device region and a memory array region. The memory array region has a memory device formed on the semiconductor substrate. The method further includes forming a capping layer over the silicon material layer and over the memory device and removing the capping layer from over the memory device in the memory array region using a first chemical mechanical polishing process while leaving at least a first portion of the capping layer in place over the logic device region. Further, the method includes removing the first the silicon material layer from over the memory device in the memory array region using a second chemical mechanical polishing process.
    Type: Application
    Filed: November 27, 2013
    Publication date: May 28, 2015
    Inventors: Lup San Leong, Alan Cing Gie Lim, Ling Wu, Jian Bo Yang
  • Patent number: 7815446
    Abstract: A flash memory device (100) includes a movable housing (1) defining a receiving cavity (15), a control board (2) having a circuit board (21) and a plug (22) connecting with the circuit board (21), an outer shield defining an opening (64), and a sleeve (3) movably ringed on one side of the movable housing (1) and enclosing the plug (22). The circuit board (21) is retained in the receiving cavity (15). The plug (22) extends out of the receiving cavity (15). The movable housing (1) is movably mounted in the outer shield. The movable housing (1) has an elastic section (141) with a button (18) coupled thereon. The button (18) pushes the plug (22) moving in or out of the sleeve (3) and the outer shield.
    Type: Grant
    Filed: July 16, 2008
    Date of Patent: October 19, 2010
    Assignee: Hon Hai Precision Ind. Co., Ltd.
    Inventor: Jian-Bo Yang
  • Patent number: 7542952
    Abstract: A multiple criteria decision making method in which a plurality of basic criteria are assessed in order to generate an assessment on a general criterion is provided. An example of such a method can include the steps of: making an assessment of the ith basic criterion under a set of grades; and transforming the assessment to an assessment of the general criterion under the set of grades using a matrix equation.
    Type: Grant
    Filed: September 25, 2007
    Date of Patent: June 2, 2009
    Inventors: Jian-Bo Yang, Xu Dong-Ling
  • Publication number: 20090021904
    Abstract: A flash memory device (100) includes a movable housing (1) defining a receiving cavity (15), a control board (2) having a circuit board (21) and a plug (22) connecting with the circuit board (21), an outer shield defining an opening (64), and a sleeve (3) movably ringed on one side of the movable housing (1) and enclosing the plug (22). The circuit board (21) is retained in the receiving cavity (15). The plug (22) extends out of the receiving cavity (15). The movable housing (1) is movably mounted in the outer shield. The movable housing (1) has an elastic section (141) with a button (18) coupled thereon. The button (18) pushes the plug (22) moving in or out of the sleeve (3) and the outer shield.
    Type: Application
    Filed: July 16, 2008
    Publication date: January 22, 2009
    Inventor: Jian-Bo Yang
  • Publication number: 20080040305
    Abstract: There is disclosed a multiple criteria decision analysing method in which a plurality of basic criteria are assessed in order to a general criterion, including the steps of: making an assessment of the lth basic criteria under a set of grades; and transforming the assessment to an assessment of the general criterion under a set of grades using the matrix equation.
    Type: Application
    Filed: September 25, 2007
    Publication date: February 14, 2008
    Inventors: Jian-Bo Yang, Xu Dong-Ling
  • Publication number: 20030208514
    Abstract: There is disclosed a multiple criteria decision analysing method in which a plurality L of basic criteria are assessed in order to a general criterion, comprising the steps of:
    Type: Application
    Filed: April 30, 2003
    Publication date: November 6, 2003
    Inventors: Jian-Bo Yang, Dong-Ling Xu