Patents by Inventor Jian Liang

Jian Liang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230188994
    Abstract: A router networking method includes a child router that is coupled with an interface of the parent router, to be combined with the parent router, where a network corresponding to the interface is a first network, network isolation exists between the first network and a second network, and the second network is a local area network provided by the parent router. The child router accesses the first network and obtains networking information from the first network, where the networking information is used to access the second network. The child router is unplugged from the interface of the parent router to be detached from the parent router. The child router is coupled with a target interface, where a network corresponding to the target interface is the second network, and the child router accesses the second network based on the networking information using the target interface.
    Type: Application
    Filed: April 6, 2021
    Publication date: June 15, 2023
    Inventors: Jian Liang, Zongbao Yu
  • Patent number: 11663690
    Abstract: A video processing method includes: decoding apart of a bitstream to generate a decoded frame, where the decoded frame is a projection-based frame that includes projection faces in a projection layout; and remapping sample locations of the projection-based frame to locations on the sphere, where a sample location within the projection-based frame is converted into a local sample location within a projection face packed in the projection-based frame; in response to adjustment criteria being met, an adjusted local sample location within the projection face is generated by applying adjustment to at least one coordinate value of the local sample location within the projection face, and the adjusted local sample location within the projection face is remapped to a location on the sphere; and in response to the adjustment criteria not being met, the local sample location within the projection face is remapped to a location on the sphere.
    Type: Grant
    Filed: January 12, 2022
    Date of Patent: May 30, 2023
    Assignee: MEDIATEK INC.
    Inventors: Ya-Hsuan Lee, Jian-Liang Lin
  • Patent number: 11659206
    Abstract: A video decoding method includes: decoding a part of a bitstream to generate a decoded frame, and parsing at least one syntax element from the bitstream. The decoded frame is a projection-based frame that includes projection faces packed in a cube-based projection layout. At least a portion of a 360-degree content of a sphere is mapped to the projection faces via cube-based projection. The at least one syntax element is indicative of a guard band configuration of the projection-based frame.
    Type: Grant
    Filed: July 1, 2020
    Date of Patent: May 23, 2023
    Assignee: MEDIATEK INC.
    Inventors: Ya-Hsuan Lee, Jian-Liang Lin
  • Patent number: 11652413
    Abstract: A boost converter includes an input terminal, an output terminal, a switching terminal, a low-side transistor, and a down-mode detection circuit. The low-side transistor is coupled to the switching terminal. The down-mode detection circuit is coupled to the low-side transistor. The down-mode detection circuit is configured to detect a voltage at the output terminal greater than a voltage at the input terminal, and turn off the low-side transistor based on the voltage at the output terminal being greater than the voltage at the input terminal.
    Type: Grant
    Filed: December 8, 2020
    Date of Patent: May 16, 2023
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Linjue Li, Jian Liang
  • Patent number: 11600002
    Abstract: Methods, systems, and devices for graphics processing are described. A device may receive an image including a set of pixels. The device may render a first subset of pixels in each bin of a set of bins during a first rendering pass, and defer rendering a second subset of pixels and a third subset of pixels in each bin of the set of bins during the first rendering pass. The second subset of pixels may include edge pixels and the third subset of pixels may be between the first subset of pixels and the second subset of pixels. The device may render the second subset of pixels and the third subset of pixels in each bin of the set of bins during a second rendering pass based on rendering the first subset of pixels. The device may then output the image based on the first and second rendering pass.
    Type: Grant
    Filed: June 3, 2020
    Date of Patent: March 7, 2023
    Assignee: QUALCOMM Incorporated
    Inventors: Jian Liang, Andrew Evan Gruber, Tao Wang, Srihari Babu Alla, Kalyan Kumar Bhiravabhatla, Jonnala Gadda Nagendra Kumar, William Licea-Kane, Fredrick Alan Hickman
  • Patent number: 11583093
    Abstract: A chair includes a seat support, a leg frame extended underneath the seat support, a back support upwardly extended from the seat support, and a back support guiding arrangement. The back support guiding arrangement includes a guiding wheel rotatably mounted on a rear side of the back support for biasing against an external object so that when the back support of the chair accidentally hits the external object, the guiding wheel is arranged to act as a buffer to minimize damage imparted on the external object.
    Type: Grant
    Filed: May 17, 2021
    Date of Patent: February 21, 2023
    Inventor: Jian Liang
  • Patent number: 11589041
    Abstract: A method and apparatus of video coding incorporating Deep Neural Network are disclosed. A target signal is processed using DNN (Deep Neural Network), where the target signal provided to DNN input corresponds to the reconstructed residual, output from the prediction process, the reconstruction process, one or more filtering processes, or a combination of them. The output data from DNN output is provided for the encoding process or the decoding process. The DNN can be used to restore pixel values of the target signal or to predict a sign of one or more residual pixels between the target signal and an original signal. An absolute value of one or more residual pixels can be signalled in the video bitstream and used with the sign to reduce residual error of the target signal.
    Type: Grant
    Filed: November 15, 2021
    Date of Patent: February 21, 2023
    Assignee: MEDIATEK INC.
    Inventors: Yu-Wen Huang, Yu-Chen Sun, Tzu-Der Chuang, Jian-Liang Lin, Ching-Yeh Chen
  • Publication number: 20230029559
    Abstract: In described examples, a boost converter includes an inductor, a voltage input, a current regulator, an intermediate node, a transistor, and a regulation circuit. The inductor has first and second terminals. The voltage input provides an input voltage, and is coupled to the first inductor terminal. The current regulator has current regulator input and output. The current regulator input is coupled to the second inductor terminal. The current regulator allows current to flow from the current regulator input to the current regulator output, and not vice versa. The intermediate node provides a node voltage. The transistor includes a source, a drain, and a gate. The drain is coupled to the current regulator output via the intermediate node. The regulation circuit includes a first regulation input coupled to receive the input voltage, a second regulation input coupled to the intermediate node, and a regulation output coupled to the gate.
    Type: Application
    Filed: July 27, 2021
    Publication date: February 2, 2023
    Inventors: Chen Feng, Jian Liang, Weicheng Zhang
  • Patent number: 11567520
    Abstract: A voltage converter includes an inductor, a transistor, a comparator, an error amplifier, and a slope generator circuit. The transistor has a control input and first and second transistor current terminals. The first current terminal is coupled to the inductor. The comparator has first and second comparator inputs and a comparator output. The comparator output is usable to control the transistor's control input. The error amplifier has an error amplifier input and an error amplifier output. The error amplifier output is coupled to the first comparator input. The slope generator circuit is coupled to at least one of the first or second comparator inputs. The slope generator circuit is configured to generate a slope compensation current which, during at least a portion of each cycle of operation of the voltage regulator, varies approximately exponentially with respect to time.
    Type: Grant
    Filed: April 15, 2021
    Date of Patent: January 31, 2023
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Weicheng Zhang, Jian Liang
  • Patent number: 11569743
    Abstract: A DC-DC converter control circuit includes an error amplifier, a voltage-to-current conversion circuit, an oscillator circuit, and a pulse frequency modulation (PFM) control circuit. The error amplifier is configured to generate a difference voltage as a difference of an output voltage of the DC-DC converter circuit and a reference voltage. The voltage-to-current conversion circuit configured to convert the difference voltage to a difference current. The oscillator circuit is configured to generate a clock signal at a predetermined frequency for pulse width modulation. The PFM control circuit is configured to disable the oscillator circuit, based on the difference current, for PFM operation.
    Type: Grant
    Filed: December 9, 2020
    Date of Patent: January 31, 2023
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Yangwei Yu, Jian Liang, Weicheng Zhang, Ming Luo
  • Publication number: 20230001722
    Abstract: The utility model discloses an auxiliary tool for stamping stamps. The utility model is characterized by comprising a straight cube with evenly spaced positioning grooves on the front side. The grooves can assist the stamping stamp work to keep the printed texts neat and evenly spaced. The purpose of the utility model is to overcome the deficiencies in the prior art, and provide a simple structure, convenient work for stamping stamps, and making the stamped characters neat and beautiful.
    Type: Application
    Filed: July 1, 2022
    Publication date: January 5, 2023
    Inventor: Jian LIANG
  • Publication number: 20220391975
    Abstract: Systems, apparatuses, methods, and computer program products are disclosed for pricing a callable instrument. A plurality of paths corresponding to the value of an underlying entity of the callable instrument are determined corresponding to a set of dates. The set of dates includes a particular exercise date of the callable instrument. A deep neural network (DNN) of a backward DNN with value reset solver is trained until a convergence requirement is satisfied. The backward DNN with value reset solver propagates in reverse time order from a final value to an initial value based on the path. At the particular exercise date, an expected value is determined and compared to criteria. If the criteria are satisfied the value of the callable instrument at the particular exercise date is set to a reset value, otherwise the value at the particular exercise date is maintained as a value determined via the propagation.
    Type: Application
    Filed: September 30, 2019
    Publication date: December 8, 2022
    Inventors: Jian Liang, Zhe Xu, Peter Li
  • Publication number: 20220361703
    Abstract: A French press rod assembly configured to be operably engaged with a French press coffee pot wherein the French press rod assembly provides an element to engage therewith to stabilize the French press rod assembly during removal of the filter screen. The French press rod assembly includes a shaft having a first end and a second end. A handle is secured to the first end of the shaft and a filter screen is removably secured to the second end of the shaft. The shaft has surroundably mounted thereto proximate the second end an engagement member. A flow member is rotatably secured to the shaft wherein the flow member is intermediate the second end of the shaft and the engagement member. In a preferred embodiment of the flow member, the flow member is rotatably mounted to the shaft and includes a plurality of blades.
    Type: Application
    Filed: September 1, 2021
    Publication date: November 17, 2022
    Inventors: Shuijin Liang, Sterling Enyu Lyang, Zhujuan Yang, Jian Liang
  • Publication number: 20220361678
    Abstract: A chair includes a seat support, a leg frame extended underneath the seat support, a back support upwardly extended from the seat support, and a back support guiding arrangement. The back support guiding arrangement includes a guiding wheel rotatably mounted on a rear side of the back support for biasing against an external object so that when the back support of the chair accidentally hits the external object, the guiding wheel is arranged to act as a buffer to minimize damage imparted on the external object.
    Type: Application
    Filed: May 17, 2021
    Publication date: November 17, 2022
    Inventor: Jian LIANG
  • Patent number: 11494870
    Abstract: An exemplary video processing method includes: receiving an omnidirectional content corresponding to a sphere; obtaining a plurality of projection faces from the omnidirectional content of the sphere according to a pyramid projection; creating at least one padding region; and generating a projection-based frame by packing the projection faces and the at least one padding region in a pyramid projection layout. The projection faces packed in the pyramid projection layout include a first projection face. The at least one padding region packed in the pyramid projection layout includes a first padding region. The first padding region connects with at least the first projection face, and forms at least a portion of one boundary of the pyramid projection layout.
    Type: Grant
    Filed: August 17, 2018
    Date of Patent: November 8, 2022
    Assignee: MEDIATEK INC.
    Inventors: Jian-Liang Lin, Peng Wang, Ya-Hsuan Lee, Hung-Chih Lin, Shen-Kai Chang
  • Patent number: 11477490
    Abstract: A video processing method includes receiving a reconstructed frame, and applying in-loop filtering, by at least one in-loop filter, to the reconstructed frame. The step of in-loop filtering includes performing a sample adaptive offset (SAO) filtering operation. The step of performing the SAO filtering operation includes keeping a value of a current pixel unchanged by blocking the SAO filtering operation of the current pixel included in the reconstructed frame from being applied across a virtual boundary defined in the reconstructed frame.
    Type: Grant
    Filed: December 25, 2020
    Date of Patent: October 18, 2022
    Assignee: MEDIATEK INC.
    Inventors: Sheng-Yen Lin, Jian-Liang Lin
  • Publication number: 20220326724
    Abstract: A voltage converter includes an inductor, a transistor, a comparator, an error amplifier, and a slope generator circuit. The transistor has a control input and first and second transistor current terminals. The first current terminal is coupled to the inductor. The comparator has first and second comparator inputs and a comparator output. The comparator output is usable to control the transistor's control input. The error amplifier has an error amplifier input and an error amplifier output. The error amplifier output is coupled to the first comparator input. The slope generator circuit is coupled to at least one of the first or second comparator inputs. The slope generator circuit is configured to generate a slope compensation current which, during at least a portion of each cycle of operation of the voltage regulator, varies approximately exponentially with respect to time.
    Type: Application
    Filed: April 15, 2021
    Publication date: October 13, 2022
    Inventors: Weicheng ZHANG, Jian LIANG
  • Publication number: 20220320712
    Abstract: A package antenna apparatus including a package substrate, wherein an antenna array is disposed on the package substrate, and a transceiver chip coupled to the antenna array, where the transceiver chip is fastened to the package substrate, and the transceiver chip has a first pad and a second pad, and a filter disposed on the package substrate, where the filter comprises an input port and an output port, the input port is coupled to the first pad of the transceiver chip, the output port is coupled to the second pad of the transceiver chip, and the filter is configured to filter a signal of the transceiver chip that is input through the input port, and is further configured to output a filtered signal to the transceiver chip through the output port.
    Type: Application
    Filed: June 17, 2022
    Publication date: October 6, 2022
    Inventors: Lei Lu, Jian Liang, Xiuyin Zhang, Jinxu Xu, Huiyang Li, Lian Yang, Wanli Zhan, Zongzhi Gao, Weixi Zhou
  • Publication number: 20220293946
    Abstract: There is provided a cathode material comprising a layer of sulfur species dispersed within or thereon a porous matrix comprising a first conducting carbon material, a second conducting carbon material and a binder, wherein the second conducting carbon material is carbon fiber or carbon nanotube. There is also provided a cathode material comprising a layer of sulfur species dispersed within or thereon a porous matrix comprising a first conducting carbon material, a second conducting carbon material and a binder, wherein said porous matrix is interconnected with uniform pores. There are also provided methods for preparing the above cathode material(s).
    Type: Application
    Filed: June 2, 2020
    Publication date: September 15, 2022
    Inventors: Jackie Y. Ying, Jian Liang Cheong
  • Patent number: D974535
    Type: Grant
    Filed: September 13, 2021
    Date of Patent: January 3, 2023
    Inventor: Jian Liang