Patents by Inventor Jian-feng Li

Jian-feng Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240169682
    Abstract: Aspects of the invention include techniques for intimacy-based masking of three dimensional (3D) face landmarks within a metaverse. A non-limiting example method includes determining a degree of intimacy R between a first user and a second user responsive to a first avatar of the first user being observed by a second avatar of the second user in a virtual environment. An initial set of M landmarks of a feature of the first avatar is determined and N landmarks are randomly selected from M for masking. The N landmarks are replaced with random noise sampled with a unit normal distribution to define a set of noised landmarks X that are then iteratively denoised to define a set of denoised landmarks D. A masked version of the first avatar is presented to the second user by modifying the feature of the first avatar with the set of denoised landmarks D.
    Type: Application
    Filed: November 21, 2022
    Publication date: May 23, 2024
    Inventors: Xiao Feng Ji, Yu Hong Li, Jian Jun Wang, Yuan Jin, Li ping Wang
  • Patent number: 11990518
    Abstract: The present disclosure provides a semiconductor device and a fabricating method thereof, the semiconductor device including a substrate, a nucleation layer, a buffer layer, an active layer and a gate electrode. The nucleation layer is disposed on the substrate, and the buffer layer is disposed on the nucleation layer, wherein the buffer layer includes a first superlattice layer having at least two heteromaterials alternately arranged in a horizontal direction, and a second superlattice layer having at least two heteromaterials vertically stacked along a vertical direction. The at least two heteromaterials stack at least once within the second superlattice layer. The active layer is disposed on the buffer layer, and the gate electrode is disposed on the active layer.
    Type: Grant
    Filed: April 19, 2021
    Date of Patent: May 21, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chia-Hua Chang, Jian-Feng Li, Hsiang-Chieh Yen
  • Publication number: 20240069974
    Abstract: A system may include a memory and a processor in communication with the memory. The processor may be configured to perform operations. The operations may include synchronizing a policy between a primary node and a compute node and maintaining a resource registry on a client of the primary node. The operations may include communicating a direct communication between the client and the compute node, and the direct communication may include a first task. The operations may include returning a first result for the first task directly from the compute node to the client.
    Type: Application
    Filed: August 25, 2022
    Publication date: February 29, 2024
    Inventors: Fei Qi, Jian Feng Wang, Meng Jie Li, Rui Gao, A Long Zhi
  • Publication number: 20240069304
    Abstract: A voice coil motor held immobile by magnetic attraction when not in use for photography purposes includes a base, a magnet fixed thereto, a carrier, a magnetic member, and a coil. The magnetic member is fixed to the carrier and is attracted by a permanent magnetic field (first MF) of the magnet on the base. The coil is fixed to the carrier and the magnetic member. When the voice coil motor is powered on, the coil generates a second magnetic field (second MF) opposing the first MF. The second MF reduces or eliminates the attractive force of the first MF of the magnet, to separate the carrier and its fittings and allow them to work freely. A lens module and an electronic device are further provided.
    Type: Application
    Filed: September 30, 2022
    Publication date: February 29, 2024
    Inventors: YU-SHUAI LI, SHIN-WEN CHEN, KUN LI, JIAN-CHAO SONG, WU-TONG WANG, DING FENG
  • Publication number: 20220285500
    Abstract: The present disclosure provides a semiconductor device and a fabricating method thereof, the semiconductor device including a substrate, a nucleation layer, a buffer layer, an active layer and a gate electrode. The nucleation layer is disposed on the substrate, and the buffer layer is disposed on the nucleation layer, wherein the buffer layer includes a first superlattice layer having at least two heteromaterials alternately arranged in a horizontal direction, and a second superlattice layer having at least two heteromaterials vertically stacked along a vertical direction. The at least two heteromaterials stack at least once within the second superlattice layer. The active layer is disposed on the buffer layer, and the gate electrode is disposed on the active layer.
    Type: Application
    Filed: April 19, 2021
    Publication date: September 8, 2022
    Inventors: Chia-Hua Chang, Jian-Feng Li, Hsiang-Chieh Yen
  • Publication number: 20220115520
    Abstract: A high electron mobility transistor (HEMT) is disclosed. The HEMT includes a substrate, a first epitaxial layer disposed on the substrate, a second epitaxial layer disposed on the first epitaxial layer, a third epitaxial layer disposed on the second epitaxial layer, and a gate disposed on the third epitaxial layer. An upper portion of the first epitaxial layer has a plurality of first recesses. The second epitaxial layer partially fills the first recesses and surrounding a plurality of first air slits in the first recesses.
    Type: Application
    Filed: November 9, 2020
    Publication date: April 14, 2022
    Inventors: Jian-Feng Li, Chia-Hua Chang, Hsiang-Chieh Yen
  • Patent number: 11003034
    Abstract: The present invention relates to a display device comprising: a display panel having a plurality of pixels and a plurality of source lines, wherein each of the pixels is electrically connected to a respective source line; and an SD IC for providing pixel voltages and receiving a noise storage control signal and a noise output control signal; characterized in that the SD IC further comprises a noise reduce module to store voltage levels of the pixel voltages as compensating voltages based on the noise storage control signal and to output the compensating voltages based on the noise output control signal, wherein during a normal period, the SD IC outputs the pixel voltages to the pixels; during a compensation period, the SD IC outputs the compensating voltages to the pixels; wherein the noise output control signal is phased-delayed with respect to the noise storage control signal.
    Type: Grant
    Filed: September 13, 2018
    Date of Patent: May 11, 2021
    Assignee: AU OPTRONICS (KUNSHAN) CO., LTD.
    Inventors: Chung-Yu Huang, Jian-Feng Li, Kai-Yuan Siao
  • Publication number: 20200166815
    Abstract: The present invention relates to a display device comprising: a display panel having a plurality of pixels and a plurality of source lines, wherein each of the pixels is electrically connected to a respective source line; and an SD IC for providing pixel voltages and receiving a noise storage control signal and a noise output control signal; characterized in that the SD IC further comprises a noise reduce module to store voltage levels of the pixel voltages as compensating voltages based on the noise storage control signal and to output the compensating voltages based on the noise output control signal, wherein during a normal period, the SD IC outputs the pixel voltages to the pixels; during a compensation period, the SD IC outputs the compensating voltages to the pixels; wherein the noise output control signal is phased-delayed with respect to the noise storage control signal.
    Type: Application
    Filed: September 13, 2018
    Publication date: May 28, 2020
    Inventors: Chung-Yu HUANG, Jian-Feng LI, Kai-Yuan SIAO
  • Patent number: 10192515
    Abstract: A data driver for a display device comprises a first boost circuit, a first gate clock generation circuit, a first level shift circuit, and a data drive circuit. The first boost circuit is used to receive a supply voltage value and generate at least one preset voltage value. The first gate clock generation circuit is electrically coupled to the first boost circuit, and is used to receive a plurality of timing signals and at least one preset voltage value, and generate at least one first timing signal. The first level shift circuit is used to receive the at least one first timing signal and generate at least one gate timing signal. The data drive circuit is used to receive the timing signals, and generate a plurality of display data signals.
    Type: Grant
    Filed: December 20, 2016
    Date of Patent: January 29, 2019
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Shih-Yuan Su, Kai-Yuan Siao, Jian-Feng Li, Chun-Kuei Wen
  • Publication number: 20180025696
    Abstract: A data driver for a display device comprises a first boost circuit, a first gate clock generation circuit, a first level shift circuit, and a data drive circuit. The first boost circuit is used to receive a supply voltage value and generate at least one preset voltage value. The first gate clock generation circuit is electrically coupled to the first boost circuit, and is used to receive a plurality of timing signals and at least one preset voltage value, and generate at least one first timing signal. The first level shift circuit is used to receive the at least one first timing signal and generate at least one gate timing signal. The data drive circuit is used to receive the timing signals, and generate a plurality of display data signals.
    Type: Application
    Filed: December 20, 2016
    Publication date: January 25, 2018
    Inventors: Shih-Yuan SU, Kai-Yuan Siao, Jian-Feng Li, Chun-Kuei Wen
  • Patent number: 8982030
    Abstract: A gate output control method is adapted into a flat display having a plurality of gate drive integrated circuits. The method comprises: providing a gate control signal; providing a oblique control signal to oblique modulate the gate control signal for generating a gate control signal with oblique; modulating the gate control signal with oblique to obtain a modulated gate control signal; and outputting the modulated gate control signal to the gate drive integrated circuits. A falling edge of the modulated gate control signal comprises a oblique-varying period and a vertical-varying period. In the oblique-varying period, the modulated gate control signal firstly changes to a predetermined voltage in a first slope, and then changes in a second slope until the vertical-varying period. In the vertical-varying period, the modulated gate control signal changes vertically or nearly vertically.
    Type: Grant
    Filed: July 15, 2010
    Date of Patent: March 17, 2015
    Assignee: AU Optronics Corp.
    Inventors: Kai-Yuan Siao, Jian-Feng Li, Hsiao-Chung Cheng, Tsung-Hung Lee, Chao-Ching Hsu
  • Publication number: 20140267212
    Abstract: A plurality of pixels of a display panel are driven with a first polarity inversion to display a first image, driven with the first polarity inversion to display a second image after the first image is displayed, driven with a second polarity inversion to display a third image, and driven with the second polarity inversion to display a fourth image after the third image is displayed. The polarity of a first pixel of the first image is opposite to the polarity of a first pixel of the second image. The polarity of a first pixel of the third image is opposite to the polarity of a first pixel of the fourth image. The first polarity inversion is different from the second polarity inversion.
    Type: Application
    Filed: October 13, 2013
    Publication date: September 18, 2014
    Applicant: AU Optronics Corp
    Inventors: Jian-Feng Li, Jen-Chieh Chen, Kai-Yuan Siao, Yi-Fan Lin
  • Patent number: 8542226
    Abstract: A gate pulse modulating circuit includes a timing controller capable of generating an output enable signal and a plurality of timing control signals; a high gate voltage generating unit, electrically connected to the timing controller for receiving the timing control signals, capable of generating a high gate voltage with a waveform including a plurality of cutting edges in response to the timing control signals; a low gate voltage generating unit capable of generating a low gate voltage; and a gate driver, electrically connected to the timing controller for receiving the output enable signal and the high gate voltage generating unit for receiving the high gate voltage and the low gate voltage generating unit for receiving the low gate voltage, capable of generating a plurality of gate pulses in response to a plurality of enable periods of the output enable signal; wherein a waveform of the gate pulses includes a plurality of cutting edges.
    Type: Grant
    Filed: May 20, 2011
    Date of Patent: September 24, 2013
    Assignee: Au Optronics Corp.
    Inventors: Jian-Feng Li, Chao-Ching Hsu, Jen-Chieh Chen
  • Publication number: 20130236645
    Abstract: A method for locally forming a smooth surface on frosted glass includes steps of: a) preparing a piece of frosted glass; b) locally coating the frosted glass with a sealant; and c) such forming the sealant that has a smooth surface. The smooth surface of the frosted glass allows a video camera to capture clear images therethrough so as to prevent blurred images caused by micro-roughness on a surface of the frosted glass.
    Type: Application
    Filed: March 5, 2013
    Publication date: September 12, 2013
    Applicant: LIEFCO OPTICAL LTD.
    Inventors: Chin-Lung CHANG, Jian-Feng LI, Chia-Hsin CHANG
  • Patent number: 8421772
    Abstract: A resistive touch control device and driving methods and a driving controller thereof are provided to switch operation modes of a touch panel. Depending on the user's requirement, the touch panel can be operated in multi-touch mode or only in an analog mode with high resolution. In other words, the touch control device can be operated in a digital mode, the analog mode, or a hybrid mode including both of the digital and the analog modes.
    Type: Grant
    Filed: January 22, 2010
    Date of Patent: April 16, 2013
    Assignee: Wintek Corporation
    Inventors: Jian-Feng Li, Wen-Chun Wang, Chih-Chang Lai, Kuo-Chang Su, Gwo-Sen Lin, Chih-Hao Wang
  • Patent number: 8319744
    Abstract: A multi-touch resistive touch panel including a first substrate, a second substrate and a spacing element is provided. The spacing element is disposed between the first substrate and the second substrate. The first substrate has a first transparent electrode, two first conductive electrodes and two second conductive electrodes, wherein the first conductive electrodes are disposed at two boundaries of the first transparent electrode in parallel, and the second conductive electrode are disposed at another two boundaries of the first transparent electrode in parallel and perpendicular to the first conductive electrodes. The second substrate has many second transparent electrodes disposed on a surface of the second substrate facing the first transparent electrode and arranged in a first axial direction, and the second transparent electrodes themselves are extended in a second axial direction perpendicular to the first axial direction.
    Type: Grant
    Filed: October 29, 2009
    Date of Patent: November 27, 2012
    Assignee: Wintek Corporation
    Inventor: Jian-Feng Li
  • Patent number: 8295557
    Abstract: A face image processing method is applied to an electronic device, such that the electronic device can perform a face detection to a digital image to obtain a face image in the digital image automatically, and perform a skin color detection to the face image to exclude non-skin features such as eyes, eyeglasses, eyebrows, a moustache, a mouth and nostrils on the face image, and form a skin mask in an area range of the face image belonging to skin color, and finally perform a filtering process to the area range of the face image corresponding to the skin mask to filter high-frequency, mid-frequency and low-frequency noises of an abnormal skin color in the area range of the face image, so as to quickly remove blemishes and dark spots existed in the area range of the face image.
    Type: Grant
    Filed: January 12, 2009
    Date of Patent: October 23, 2012
    Assignee: Arcsoft Hangzhou Co., Ltd.
    Inventors: Jin Wang, Guo-Gang Wang, Cheng-Jian He, Xiao-Mu Liu, Jian-Feng Li
  • Patent number: 8154673
    Abstract: A touch panel including a first transparent substrate, a second transparent substrate, first conductive patterns, first electrodes, second conductive patterns, second electrodes, and spacers is provided. The first conductive patterns are disposed on the first transparent substrate, and extend along a first direction. The first electrodes are disposed at the two ends of the first conductive patterns in the first direction. The second conductive patterns are disposed on the second substrate, and extend along a second direction intersecting the first direction. The second electrodes are disposed at the two ends of the second conductive patterns in the second direction. The abovementioned conductive patterns are located between the first substrate and the second substrate, and the projections of the conductive patterns to the first transparent substrate are partially overlapped to form sensing blocks. The spacers are disposed between the first conductive patterns and the second conductive patterns to form a gap.
    Type: Grant
    Filed: December 24, 2008
    Date of Patent: April 10, 2012
    Assignee: Wintek Corporation
    Inventors: Jian-Feng Li, Gwo-Sen Lin
  • Publication number: 20120038610
    Abstract: A gate pulse modulating circuit includes a timing controller capable of generating an output enable signal and a plurality of timing control signals; a high gate voltage generating unit, electrically connected to the timing controller for receiving the timing control signals, capable of generating a high gate voltage with a waveform including a plurality of cutting edges in response to the timing control signals; a low gate voltage generating unit capable of generating a low gate voltage; and a gate driver, electrically connected to the timing controller for receiving the output enable signal and the high gate voltage generating unit for receiving the high gate voltage and the low gate voltage generating unit for receiving the low gate voltage, capable of generating a plurality of gate pulses in response to a plurality of enable periods of the output enable signal; wherein a waveform of the gate pulses includes a plurality of cutting edges.
    Type: Application
    Filed: May 20, 2011
    Publication date: February 16, 2012
    Applicant: AU OPTRONICS CORP
    Inventors: Jian-Feng Li, Chao-Ching Hsu, Jen-Chieh Chen
  • Patent number: 8000556
    Abstract: A method for estimating noise according to a multiresolution model is applied to an imaging device and comprises steps of: using an imaging sensor of the imaging device to capture a series of images of a scene under different imaging conditions; processing the images with a multiresolution transformation process to obtain a series of sub-images corresponding to different frequency layers; processing a series of the sub-images of the images that are in a same frequency layer to generate an averaged image; determining a difference between each of the sub-images in the same frequency layer and the averaged image corresponding to that frequency layer, and calculating the differences and the averaged image to obtain noise level functions of the imaging sensor in the different frequency layers under the different imaging conditions; and defining the noise level functions of the imaging sensor as noise samples for establishing an a priori model database.
    Type: Grant
    Filed: May 15, 2008
    Date of Patent: August 16, 2011
    Assignee: ArcSoft, Inc.
    Inventors: Jian-Feng Li, Cheng-Jian He, Jin Wang