Abstract: Provided are a frequency band scheduling method, a communication node, and a computer-readable storage medium. The method includes that: a reference frequency band and at least one detection frequency band are acquired, where the reference frequency band is a frequency band in which a first system does not interfere with a second system, and the at least one detection frequency band is a frequency band in which the first system and the second system interfere with each other; frequency band configuration information is sent to a terminal device, where the frequency band configuration information includes configuration information of the reference frequency band and configuration information of all detection frequency bands; frequency band measurement information that the terminal device sends according to the frequency band configuration information is received.

Abstract: This invention relates to the technical field of harmonic elimination for ferromagnetic resonance for a voltage transformer (abbreviated as PT), in particular, to a harmonic elimination method for ferromagnetic resonance for an active resistance-matching voltage transformer based on PID-adjustment, including compiling a resistance matching algorithm; designing and building a harmonic elimination control system based on the PID control strategy; presetting an active resistance-matching strategy; designing an engineering scheme for placing resistors.

Abstract: This invention relates to the technical field of harmonic elimination for ferromagnetic resonance for a voltage transformer (abbreviated as PT), in particular, to a harmonic elimination method for ferromagnetic resonance for an active resistance-matching voltage transformer based on PID-adjustment, including compiling a resistance matching algorithm; designing and building a harmonic elimination control system based on the PID control strategy; presetting an active resistance-matching strategy; designing an engineering scheme for placing resistors.

Abstract: Disclosed are a method and a device for energy saving control of a base station, and a computer-readable storage medium. The method may include: acquiring service data of the base station; triggering an energy-saving mode of the base station corresponding to the service data meeting a trigger condition; calculating a service load of the base station in the energy-saving mode; and controlling, based on a relationship between the calculated service load and a preset slot threshold, a corresponding slot to be off or on.

Abstract: A method includes: transmitting an incident light to an object located on a stage, in which a first light and a second light are reflected; receiving the first light and the second light by an imaging lens group to obtain a third pattern corresponding to the first pattern and a fourth pattern corresponding to the second pattern; transmitting the third pattern and the fourth pattern to an image sensor, in which a center point of the third pattern and a center point of the fourth pattern are separated by a first distance on the image sensor; calculating a tilted angle between an optical axis of the imaging lens group and a normal direction of the stage according to the first distance; and adjusting the stage according to the tilted angle such that the normal direction is parallel to the optical axis.

Abstract: A method includes: transmitting an incident light to an object located on a stage, in which a first light and a second light are reflected; receiving the first light and the second light by an imaging lens group to obtain a third pattern corresponding to the first pattern and a fourth pattern corresponding to the second pattern; transmitting the third pattern and the fourth pattern to an image sensor, in which a center point of the third pattern and a center point of the fourth pattern are separated by a first distance on the image sensor; calculating a tilted angle between an optical axis of the imaging lens group and a normal direction of the stage according to the first distance; and adjusting the stage according to the tilted angle such that the normal direction is parallel to the optical axis.

Abstract: A failure detector circuit for detecting status of a protected circuit, the failure detector circuit having an operating cycle, has an enabling signal generator, a comparator circuit, a delay circuit. The enabling signal generator enables the comparator for an enable time in each operating cycle. The comparator circuit compares an output of the protected circuit with a reference signal. The delay circuit receives an output signal of the comparator to decide whether a failure occurred within a give delay time.

Abstract: The present disclosure discloses a voltage regulator including a trimming circuit. The present disclosure also discloses a method for trimming an output voltage of a voltage regulator. In one embodiment the voltage regulator may include a power conversion module, a feedback and trimming module and a control module. The voltage regulator may be able to provide an output voltage that could be regulated to a plurality of output values, the feedback and trimming module may be able to trim the plurality of output values to their desired values successively and independently.

Abstract: The embodiments of the present invention disclose a synchronous rectification circuit and associated zero-crossing detection method. The synchronous rectification circuit includes a synchronous rectifier having a source, a drain, and at least two gates. The synchronous rectifier having N MOS cells connected in parallel, wherein N is an integer greater than or equal to 2. Through comparing a voltage signal across the drain and the source of the synchronous rectifier with a first and a second threshold voltage, part of the N MOS cells is turned off once the voltage signal is equal to the first threshold voltage, and the left part of the N MOS cells is turned off once the voltage signal is equal to the second threshold voltage. Thus, the accuracy of zero-crossing detection is improved.

Abstract: The present disclosure discloses a voltage regulator comprising a trimming circuit. The present disclosure also discloses a method for trimming an output voltage of a voltage regulator. In one embodiment the voltage regulator may comprise a power conversion module, a feedback and trimming module and a control module. The voltage regulator may be able to provide an output voltage that could be regulated to a plurality of output values, the feedback and trimming module may be able to trim the plurality of output values to their desired values successively and independently.