Patents by Inventor Jianhua Hu
Jianhua Hu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230238179Abstract: The present disclosure generally relates to a storage device comprising soft bias structures having high coercivity and high anisotropy, and a method of forming thereof. The soft bias structures may be formed by moving a wafer in a first direction under a plume of NiFe to deposit a first NiFe layer at a first angle, moving the wafer in a second direction anti-parallel to the first direction to deposit a second NiFe layer at a second angle on the first NiFe layer, and repeating one or more times. The soft bias structures may be formed by rotating a wafer to a first position, depositing a first NiFe layer at a first angle, rotating the wafer to a second position, depositing a second NiFe layer at a second angle on the first NiFe layer, and repeating one or more times. The first and second NiFe layers have different grain structures.Type: ApplicationFiled: April 3, 2023Publication date: July 27, 2023Applicant: Western Digital Technologies, Inc.Inventors: Masaya NISHIOKA, Diane L. BROWN, Jianhua HU, Cherngye HWANG
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Patent number: 11631535Abstract: The present disclosure generally relates to a storage device comprising soft bias structures having high coercivity and high anisotropy, and a method of forming thereof. The soft bias structures may be formed by moving a wafer in a first direction under a plume of NiFe to deposit a first NiFe layer at a first angle, moving the wafer in a second direction anti-parallel to the first direction to deposit a second NiFe layer at a second angle on the first NiFe layer, and repeating one or more times. The soft bias structures may be formed by rotating a wafer to a first position, depositing a first NiFe layer at a first angle, rotating the wafer to a second position, depositing a second NiFe layer at a second angle on the first NiFe layer, and repeating one or more times. The first and second NiFe layers have different grain structures.Type: GrantFiled: October 7, 2021Date of Patent: April 18, 2023Assignee: Western Digital Technologies, Inc.Inventors: Masaya Nishioka, Diane L. Brown, Jianhua Hu, Cherngye Hwang
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Publication number: 20230111296Abstract: The present disclosure generally relates to a storage device comprising soft bias structures having high coercivity and high anisotropy, and a method of forming thereof. The soft bias structures may be formed by moving a wafer in a first direction under a plume of NiFe to deposit a first NiFe layer at a first angle, moving the wafer in a second direction anti-parallel to the first direction to deposit a second NiFe layer at a second angle on the first NiFe layer, and repeating one or more times. The soft bias structures may be formed by rotating a wafer to a first position, depositing a first NiFe layer at a first angle, rotating the wafer to a second position, depositing a second NiFe layer at a second angle on the first NiFe layer, and repeating one or more times. The first and second NiFe layers have different grain structures.Type: ApplicationFiled: October 7, 2021Publication date: April 13, 2023Inventors: Masaya Nishioka, Diane L. Brown, Jianhua Hu, Cherngye Hwang
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Patent number: 10672919Abstract: One embodiment can provide a solar module. The solar module can include one or more moisture-resistant photovoltaic structures. A respective photovoltaic structure can include a base layer, an emitter layer positioned on a first side of the base layer, and a moisture barrier layer positioned on a first side of the emitter layer, thereby reducing the amount of moisture that reaches a junction between the base layer and the emitter layer.Type: GrantFiled: September 19, 2017Date of Patent: June 2, 2020Assignee: TESLA, INC.Inventors: Yangsen Kang, Zhigang Xie, Jianhua Hu
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Publication number: 20190088802Abstract: One embodiment can provide a solar module. The solar module can include one or more moisture-resistant photovoltaic structures. A respective photovoltaic structure can include a base layer, an emitter layer positioned on a first side of the base layer, and a moisture barrier layer positioned on a first side of the emitter layer, thereby reducing the amount of moisture that reaches a junction between the base layer and the emitter layer.Type: ApplicationFiled: September 19, 2017Publication date: March 21, 2019Applicant: TESLA, INC.Inventors: Yangsen Kang, Zhigang Xie, Jianhua Hu
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Publication number: 20180062008Abstract: A system for fabrication of a photovoltaic structure is provided. During fabrication, the system can deposit a doped amorphous Si layer on a first surface of a crystalline Si substrate; and deposit, using a physical vapor deposition machine, a transparent conductive oxide layer on the doped amorphous Si layer. The deposited transparent conductive oxide layer can include In2O3 doped with TiO2 and Ta2O5, and depositing the transparent conductive oxide layer can involve maintaining the Si substrate at a temperature below 130° C. The system can further deposit a metallic layer on the transparent conductive oxide layer, and anneal the transparent conductive oxide layer.Type: ApplicationFiled: August 23, 2016Publication date: March 1, 2018Applicant: SolarCity CorporationInventors: Zhigang Xie, Yangsen Kang, Phillip M. Wu, Jianhua Hu
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Publication number: 20170345954Abstract: A low-reflection-loss low-angle-sensitive colored photovoltaic (PV) module is described. This colored PV module includes a transparent substrate; an array of solar cells encapsulated between a top encapsulation sheet and a bottom encapsulation sheet; and a color filter structure embedded between the top encapsulation sheet and the transparent substrate and configured to cause wavelength-selective reflections of incident light received by the colored PV module. Moreover, the transparent substrate includes a flat front surface configured to receive the incident light and a texture back surface configured with an array of features. The color filter structure is formed on the textured back surface of the transparent substrate to create a textured interface between the textured back surface and the color filter structure.Type: ApplicationFiled: October 14, 2016Publication date: November 30, 2017Applicant: SolarCity CorporationInventors: Yangsen Kang, Zhigang Xie, Jianhua Hu, Zheng Xu
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Patent number: 9391232Abstract: Provided are light emitting diodes (LEDs) and methods of fabricating such LEDs. An LED may include a transparent conductive oxide (TCO) layer having a varying refractive index. For example, the refractive index may be higher at the interface of the TCO layer with an epitaxial stack than on the side of the TCO layer. The refractive index variability allows reducing light intensity losses in the LED. The refractive index variability may be achieved by feeding a substrate through a deposition chamber having a variable concentration of at least one process gas, such as oxygen. Specifically, the concentration of the process gas may be higher at one slit opening than at another slit opening. As the substrate moves through the deposition chamber, the TCO layer is continuously deposited. Due to the concentration variability, the resulting TCO layer may have a variable composition throughout the thickness of the TCO layer.Type: GrantFiled: December 19, 2014Date of Patent: July 12, 2016Assignee: Intermolecular, Inc.Inventors: Minh Huu Le, Jianhua Hu
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Publication number: 20160181468Abstract: Provided are light emitting diodes (LEDs) and methods of fabricating such LEDs. An LED may include a transparent conductive oxide (TCO) layer having a varying refractive index. For example, the refractive index may be higher at the interface of the TCO layer with an epitaxial stack than on the side of the TCO layer. The refractive index variability allows reducing light intensity losses in the LED. The refractive index variability may be achieved by feeding a substrate through a deposition chamber having a variable concentration of at least one process gas, such as oxygen. Specifically, the concentration of the process gas may be higher at one slit opening than at another slit opening. As the substrate moves through the deposition chamber, the TCO layer is continuously deposited. Due to the concentration variability, the resulting TCO layer may have a variable composition throughout the thickness of the TCO layer.Type: ApplicationFiled: December 19, 2014Publication date: June 23, 2016Inventors: Minh Huu Le, Jianhua Hu
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Publication number: 20160111603Abstract: Provided are light emitting diodes (LEDs) and methods of fabricating such LEDs. Specifically, an LED has an epitaxial stack and current distribution layer disposed on and interfacing the epitaxial stack. The current distribution layer includes indium oxide and zinc oxide such that the concentration of indium oxide is between about 5% and 15% by weight. During fabrication, the current distribution layer is annealed at a temperature of less than about 500° C. or even at less than about 400° C. These low anneal temperature helps preserving the overall thermal budget of the LED while still yielding a current distribution layer having a low resistivity and low adsorption. A particular composition and method of forming the current distribution layer allows using lower annealing temperatures. In some embodiments, the current distribution layer is sputtered using indium oxide and zinc oxide targets at a pressure of less than 5 mTorr.Type: ApplicationFiled: October 21, 2014Publication date: April 21, 2016Inventors: Jianhua Hu, Ben Cardozo, Minh Huu Le, Sandeep Nijhawan, J.H. Yeh
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Oxides with thin metallic layers as transparent ohmic contacts for p-type and n-type gallium nitride
Patent number: 9306126Abstract: Transparent conductive layers usable as ohmic contacts for III-V semiconductors with work functions between 4.1 and 4.7 eV are formed by annealing layers of transparent oxide with thin (0.1-5nm) layers of conductive metal. When the layers interdiffuse during the annealing, some of the conductive metal atoms remain free to reduce resistivity and others oxidize to reduce optical absorption. Examples of the transparent oxides include indium-tin oxide, zinc oxide, and aluminum zinc oxide with up to 5 wt % Al. Examples of the metals include aluminum and titanium. The work function of the transparent conductive layer can be tuned to match the contacted semiconductor by adjusting the ratio of metal to transparent oxide.Type: GrantFiled: July 14, 2014Date of Patent: April 5, 2016Assignee: Intermolecular, Inc.Inventors: Jianhua Hu, Heng-Kai Hsu, Minh Huu Le, Sandeep Nijhawan, Teresa B. Sapirman -
Patent number: 9246062Abstract: Transparent ohmic contacts to p-GaN and other high-work-function (?4.2 eV) semiconductors are fabricated from zinc stannate (e.g., ZnSnO3). ZnO and SnO2 may be sputtered from separate targets and annealed to form the zinc stannate. The Zn:Sn ratio may be tuned over the range between 1:2 and 2:1 to optimize bandgap, work function, conductivity, and transparency for the particular semiconductor and wavelength of interest. Conductivity may be improved by crystallizing the zinc stannate, by doping with up to 5 wt % Al or In, or both.Type: GrantFiled: April 23, 2014Date of Patent: January 26, 2016Assignee: Intermolecular, Inc.Inventors: Jianhua Hu, Heng Kai Hsu, Tong Ju, Minh Huu Le, Sandeep Nijhawan, Teresa B. Sapirman
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Oxides with Thin Metallic Layers as Transparent Ohmic Contacts for P-Type and N-Type Gallium Nitride
Publication number: 20160013367Abstract: Transparent conductive layers usable as ohmic contacts for III-V semiconductors with work functions between 4.1 and 4.7 eV are formed by annealing layers of transparent oxide with thin (0.1-5 nm) layers of conductive metal. When the layers interdiffuse during the annealing, some of the conductive metal atoms remain free to reduce resistivity and others oxidize to reduce optical absorption. Examples of the transparent oxides include indium-tin oxide, zinc oxide, and aluminum zinc oxide with up to 5 wt % Al. Examples of the metals include aluminum and titanium. The work function of the transparent conductive layer can be tuned to match the contacted semiconductor by adjusting the ratio of metal to transparent oxide.Type: ApplicationFiled: July 14, 2014Publication date: January 14, 2016Inventors: Jianhua Hu, Heng-Kai Hsu, Minh Huu Le, Sandeep Nijhawan, Teresa B. Sapirman -
Publication number: 20150318446Abstract: A ternary transparent conductive oxide, indium zinc oxide (IZO), is formed as a thin film by co-sputtering zinc oxide with indium oxide at a deposition temperature between 25 and 200 C. Optionally, up to 1-2% Al may be added by various methods. The layers may be annealed at temperatures between 200 and 400 C. Measurements of IZO with 75-85 wt % In2O3 showed low resistivity and low visible absorbance, both of which were thermally stable up to 400 C.Type: ApplicationFiled: April 30, 2014Publication date: November 5, 2015Applicant: Intermolecular, Inc.Inventors: Jianhua Hu, Heng Kai Hsu, Minh Huu Le, Sandeep Nijhawan, Teresa B. Sapirman
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Publication number: 20150311397Abstract: Transparent ohmic contacts to p-GaN and other high-work-function (?4.2 eV) semiconductors are fabricated from zinc stannate (e.g., ZnSnO3). ZnO and SnO2 may be sputtered from separate targets and annealed to form the zinc stannate. The Zn:Sn ratio may be tuned over the range between 1:2 and 2:1 to optimize bandgap, work function, conductivity, and transparency for the particular semiconductor and wavelength of interest. Conductivity may be improved by crystallizing the zinc stannate, by doping with up to 5 wt % Al or In, or both.Type: ApplicationFiled: April 23, 2014Publication date: October 29, 2015Applicant: INTERMOLECULAR, INC.Inventors: Jianhua Hu, Heng Kai Hsu, Tong Ju, Minh Huu Le, Sandeep Nijhawan, Teresa B. Sapirman
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Publication number: 20150091032Abstract: Diffusion of silver from LED reflector layers is blocked by 10-50 nm barrier layers of nickel-titanium (NiTi) alloys. Optionally, the alloys also include one or more of tungsten (W), niobium (Nb), aluminum (Al), vanadium (V), tantalum (Ta), or chromium (Cr). These barriers may omit the noble-metal (e.g., platinum or gold) cap used with silver barriers based on other materials.Type: ApplicationFiled: December 20, 2013Publication date: April 2, 2015Applicant: Intermolecular, Inc.Inventors: Jianhua Hu, Minh Huu Le, Sandeep Nijhawan, Teresa B. Sapirman
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Publication number: 20150093500Abstract: The electrical and optical performance of silver LED reflective contacts in III-V devices such as GaN LEDs is limited by silver's tendency to agglomerate during annealing processes and to corrode on contact with silver-reactive materials elsewhere in the device (for example, gallium or aluminum). Agglomeration and reaction are prevented, and crystalline morphology of the silver layer may be optimized, by forming a diffusion-resistant transparent conductive layer between the silver and the source of silver-reacting metal, (2) doping the silver or the diffusion-resistant transparent conductive layer for improved adhesion to adjacent layers, or (3) doping the silver with titanium, which in some embodiments prevents agglomeration and promotes crystallization of the silver in the preferred <111> orientation.Type: ApplicationFiled: December 20, 2013Publication date: April 2, 2015Applicant: Intermolecular, Inc.Inventors: Teresa B. Sapirman, Jianhua Hu, Minh Huu Le
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Publication number: 20150060910Abstract: Methods to improve the reflection of light emitting devices are disclosed. A method consistent with the present disclosure includes forming a light generating layer over a site-isolated region of a substrate. Next, forming a first transparent conductive layer over the light generating layer. Forming a low refractive index material over the first transparent conductive layer, and in time, forming a second transparent conductive layer over the low refractive index material. Subsequently, forming a reflective material layer thereon. Accordingly, methods consistent with the present disclosure may form a plurality of light emitting devices in various site-isolated regions on a substrate.Type: ApplicationFiled: August 29, 2013Publication date: March 5, 2015Applicant: Intermolecular Inc.Inventors: Guowen Ding, Jianhua Hu, Minh Huu Le
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Patent number: 8928012Abstract: The present invention relates to a plurality of light emitting diodes connected in series to elevate the working voltage and to enable the devices to be connected directly to the AC voltage sources. The LED device has five pluralities of series-connected diodes. Four pluralities of series-connected diodes are arranged to at as a rectifier bridge so the fifth plurality of diodes is always forward biased and energized. The light emitting diodes in the device are arranged to accommodate various AC line voltages, diode operating voltages, and diode reverse breakdown voltages. The plurality of diodes was manufactured by first etching epitaxial layer to the insulating substrate to isolate individual diodes, and then use metal lines to interconnect them according to the layout design. The number of die-attach and wire-bonding steps used in the subsequent chip array and lamp manufacturing process is therefore greatly reduced or eliminated.Type: GrantFiled: January 22, 2013Date of Patent: January 6, 2015Inventor: Jianhua Hu
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Patent number: D915435Type: GrantFiled: June 11, 2018Date of Patent: April 6, 2021Assignee: NIO (ANHUI) HOLDING CO., LTD.Inventors: Wenjie Yan, Li Yao, Jianhua Hu, Feng Zhang