Patents by Inventor Jianming Fu

Jianming Fu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100258168
    Abstract: One embodiment of the present invention provides a solar cell. The solar cell includes a metallurgical-grade Si (MG-Si) substrate, a first layer of heavily doped crystalline-Si situated above the MG-Si substrate, a layer of lightly doped crystalline-Si situated above the first heavily doped crystalline-Si layer, a backside ohmic-contact layer situated on the backside of the MG-Si substrate, a second layer of heavily doped crystalline-Si situated above the lightly doped crystalline-Si layer, a first layer of dielectric situated above the second heavily doped crystalline-Si layer, a second layer of dielectric situated above the first dielectric layer, and front electrodes situated above the second dielectric layer.
    Type: Application
    Filed: April 9, 2009
    Publication date: October 14, 2010
    Applicant: Sierra Solar Power, Inc.
    Inventors: Chentao Yu, Jianming Fu, Jiunn Benjamin Heng
  • Publication number: 20100229927
    Abstract: One embodiment of the present invention provides a heterojunction solar cell. The solar cell includes a metallurgical-grade Si (MG-Si) substrate, a layer of heavily doped crystalline-Si situated above the MG-Si substrate, a layer of lightly doped crystalline-Si situated above the heavily doped crystalline-Si layer, a backside ohmic-contact layer situated on the backside of the MG-Si substrate, a passivation layer situated above the heavily doped crystalline-Si layer, a layer of heavily doped amorphous Si (a-Si) situated above the passivation layer, a layer of transparent-conducting-oxide (TCO) situated above the heavily doped a-Si layer, and a front ohmic-contact electrode situated above the TCO layer.
    Type: Application
    Filed: March 10, 2009
    Publication date: September 16, 2010
    Applicant: Sierra Solar Power, Inc.
    Inventors: Chentao Yu, Jiunn Benjamin Heng, Zheng Xu, Jianming Fu, Jianjun Liang
  • Patent number: 7687909
    Abstract: A metal/metal nitride barrier layer for semiconductor device applications. The barrier layer is particularly useful in contact vias where high conductivity of the via is important, and a lower resistivity barrier layer provides improved overall via conductivity.
    Type: Grant
    Filed: May 30, 2007
    Date of Patent: March 30, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Peijun Ding, Zheng Xu, Hong Zhang, Xianmin Tang, Praburam Gopalraja, Suraj Rengarajan, John C. Forster, Jianming Fu, Tony Chiang, Gongda Yao, Fusen E. Chen, Barry L. Chin, Gene Y. Kohara
  • Publication number: 20100065111
    Abstract: One embodiment of the present invention provides a method for fabricating a solar cell. The method includes: melting a metallurgical-grade (MG) Si feedstock, lowering a single-crystalline Si seed to touch the surface of the molten MG-Si, slowly pulling out a single-crystal Si ingot of the molten MG-Si, processing the Si ingot into single crystal Si wafers to form MG-Si substrates for subsequent epitaxial growth, leaching out residual metal impurities in the MG-Si substrate, epitaxially growing a layer of single-crystal Si thin film doped with boron on the MG-Si substrate, doping phosphor to the single-crystal Si thin film to form an emitter layer, depositing an anti-reflection layer on top of the single-crystal Si thin film, and forming the front and the back electrical contacts.
    Type: Application
    Filed: December 23, 2008
    Publication date: March 18, 2010
    Applicant: SIERRA SOLAR POWER, INC.
    Inventors: Jianming Fu, Zheng Xu, Peijun Ding, Chentao Yu, Guanghua Song, Jianjun Liang
  • Publication number: 20090255574
    Abstract: One embodiment of the present invention provides a solar cell. The solar cell includes a substrate; a polycrystalline Si (poly-Si) thin-film layer which includes a p+ layer situated above the substrate, wherein the poly-Si thin-film layer is hydrogenated; a contact under-layer situated between the foreign substrate and the poly-Si thin-film layer; a metal layer situated below the contact layer, wherein part of the metal layer reaches the p+ layer through the contact under-layer; an n-type doped amorphous-Si (a-Si) thin-film layer situated above the poly-Si thin-film layer forming a heterojunction; an optional intrinsic layer situated between the poly-Si thin-film layer and the n-type doped a-Si thin-film layer; a transparent conductive layer situated above the n-type doped a-Si thin-film layer; and a front-side electrode situated above the transparent conductive layer.
    Type: Application
    Filed: April 14, 2008
    Publication date: October 15, 2009
    Applicant: SIERRA SOLAR POWER, INC.
    Inventors: Chentao Yu, Jianming Fu
  • Publication number: 20090233438
    Abstract: A magnetron sputter reactor for sputtering deposition materials such as tantalum, tantalum nitride and copper, for example, and its method of use, in which self-ionized plasma (SIP) sputtering and inductively coupled plasma (ICP) sputtering are promoted, either together or alternately, in the same or different chambers. Also, bottom coverage may be thinned or eliminated by ICP resputtering in one chamber and SIP in another. SIP is promoted by a small magnetron having poles of unequal magnetic strength and a high power applied to the target during sputtering. ICP is provided by one or more RF coils which inductively couple RF energy into a plasma. The combined SIP-ICP layers can act as a liner or barrier or seed or nucleation layer for hole. In addition, an RF coil may be sputtered to provide protective material during ICP resputtering. In another chamber an array of auxiliary magnets positioned along sidewalls of a magnetron sputter reactor on a side towards the wafer from the target.
    Type: Application
    Filed: July 30, 2008
    Publication date: September 17, 2009
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Peijun DING, Rong TAO, Zheng XU, Daniel C. LUBBEN, Suraj RENGARAJAN, Michael A. MILLER, Arvind SUNDARRAJAN, Xianmin TANG, John C. FORSTER, Jianming FU, Roderick C. MOSELY, Fusen CHEN, Praburam GOPALRAJA
  • Patent number: 7547644
    Abstract: In a first aspect, a method is provided that includes (1) forming a first barrier layer over the sidewalls and bottom of a via using atomic layer deposition within an atomic layer deposition (ALD) chamber; (2) removing at least a portion of the first barrier layer from the bottom of the via by sputter etching; and (3) depositing a second barrier layer on the sidewalls and bottom of the via within the ALD chamber. Numerous other embodiments are provided, as are systems, methods and computer program products in accordance with these and other aspects.
    Type: Grant
    Filed: November 1, 2005
    Date of Patent: June 16, 2009
    Assignee: Applied Materials, Inc.
    Inventors: Fusen Chen, Ling Chen, Walter Benjamin Glenn, Praburam Gopalraja, Jianming Fu
  • Patent number: 7504006
    Abstract: A DC magnetron sputter reactor for sputtering deposition materials such as tantalum and tantalum nitride, for example, and its method of use, in which self-ionized plasma (SIP) sputtering and capacitively coupled plasma (CCP) sputtering are promoted, either together or alternately, in the same chamber. Also, bottom coverage may be thinned or eliminated by inductively-coupled plasma (ICP) resputtering. SIP is promoted by a small magnetron having poles of unequal magnetic strength and a high power applied to the target during sputtering. CCP is provided by a pedestal electrode which capacitively couples RF energy into a plasma. The CCP plasma is preferably enhanced by a magnetic field generated by electromagnetic coils surrounding the pedestal which act to confine the CCP plasma and increase its density.
    Type: Grant
    Filed: July 31, 2003
    Date of Patent: March 17, 2009
    Assignee: Applied Materials, Inc.
    Inventors: Praburam Gopalraja, Jianming Fu, Xianmin Tang, John C. Forster, Umesh Kelkar
  • Publication number: 20090050468
    Abstract: An aluminum interconnect metallization for an integrated circuit is controllably oxidized in a pure oxygen ambient with the optional addition of argon. It is advantageously performed as the wafer is cooled from above 300° C. occurring during aluminum sputtering to less than 100° C. allowing the aluminized wafer to be loaded into a plastic cassette. Oxidation may controllably occur in a pass-through chamber between a high-vacuum and a low-vacuum transfer chamber. The oxygen partial pressure is advantageously in the range of 0.01 to 1 Torr, preferably 0.1 to 0.5 Torr. The addition of argon to a total pressure of greater than 1 Torr promotes wafer cooling when the wafer is placed on a water-cooled pedestal. To prevent oxygen backflow into the sputter chambers, the cool down chamber is not vacuum pumped during cooling and first argon and then oxygen are pulsed into the chamber.
    Type: Application
    Filed: August 22, 2007
    Publication date: February 26, 2009
    Applicant: Applied Materials, Inc.
    Inventors: A. MILLER ALLEN, Ashish Bodke, Yong Cao, Anthony C-T Chan, Jianming Fu, Zheng Xu, Yasunori Yokoyama
  • Publication number: 20090053888
    Abstract: A method of depositing a duffusion barrier layer with overlying conductive layer or fill which lowers resistivity of a semiconductor device interconnect. The lower resistivity is achieved by inducing the formation of alpha tantalum within a tantalum-comprising barrier layer.
    Type: Application
    Filed: October 20, 2008
    Publication date: February 26, 2009
    Inventors: Peijun Ding, Zheng Xu, Hong Zhang, Xianmin Tang, Praburam Gopalraja, Suraj Rengarajan, John C. Forster, Jianming Fu, Tony Chiang, Gongda Yao, Fusen E. Chen, Barry L. Chin, Gene Y. Kohara
  • Publication number: 20080236665
    Abstract: A method for liquid phase deposition of crystalline silicon thin films, and a high efficiency solar cell that is fabricated using crystalline silicon thin film technology, has the performance of a crystal silicon solar cell, but at the cost level per unit area of a solar cell fabricated using an amorphous silicon thin film. The crystal thin film uses only 10% or less of the amount of silicon used in a wafer-based solar cell. Because of the maturity of silicon technology in semiconductor industry, this approach not only enables high volume, automated production of solar cells on a very large, low-cost substrate, but also increases the area throughput up to 10000 cm2/min from 942 cm2/min in case of CZ crystal growth.
    Type: Application
    Filed: April 2, 2007
    Publication date: October 2, 2008
    Inventors: Jianming FU, Zheng XU
  • Publication number: 20080241356
    Abstract: A method for fabricating an array of interconnected photovoltaic cells on a single substrate is disclosed. A silicon nitride (SiNx) layer is deposited onto a glass substrate for use as both a diffusion barrier and as an anti-reflection coating (ARC); an n+ Si layer is deposited as a front electrode and as a wetting layer for subsequent coating with a crystalline Si layer by liquid phase deposition (LPD); a first laser scribing is performed to separate the n+ Si layer into stripes; stripes of crystalline Si are deposited onto the first n+ Si layer, with a small offset, wherein each stripe of crystalline Si covers a majority of one stripe of n+ layer underneath, and also covers an edge portion of a neighboring stripe of n+ layer; a p+ a-Si layer is deposited; an Al layer is deposited for use as both an electrode and as a back-reflector; and the Al and p+ Si layers are divided into stripes to form spaced, isolated solar cells.
    Type: Application
    Filed: June 22, 2007
    Publication date: October 2, 2008
    Inventors: Jianming Fu, Zheng Xu
  • Publication number: 20080142359
    Abstract: A DC magnetron sputter reactor for sputtering deposition materials such as tantalum and tantalum nitride, for example, and its method of use, in which self-ionized plasma (SIP) sputtering and capacitively coupled plasma (CCP) sputtering are promoted, either together or alternately, in the same chamber. Also, bottom coverage may be thinned or eliminated by inductively-coupled plasma (ICP) resputtering. SIP is promoted by a small magnetron having poles of unequal magnetic strength and a high power applied to the target during sputtering. CCP is provided by a pedestal electrode which capacitively couples RF energy into a plasma. The CCP plasma is preferably enhanced by a magnetic field generated by electromagnetic coils surrounding the pedestal which act to confine the CCP plasma and increase its density.
    Type: Application
    Filed: October 31, 2007
    Publication date: June 19, 2008
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Praburam GOPALRAJA, Jianming FU, Xianmin TANG, John C. FORSTER, Umesh KELKAR
  • Publication number: 20080110747
    Abstract: A magnetron sputter reactor for sputtering deposition materials such as tantalum, tantalum nitride and copper, for example, and its method of use, in which self-ionized plasma (SIP) sputtering and inductively coupled plasma (ICP) sputtering are promoted, either together or alternately, in the same or different chambers. Also, bottom coverage may be thinned or eliminated by ICP resputtering in one chamber and SIP in another. SIP is promoted by a small magnetron having poles of unequal magnetic strength and a high power applied to the target during sputtering. ICP is provided by one or more RF coils which inductively couple RF energy into a plasma. The combined SIP-ICP layers can act as a liner or barrier or seed or nucleation layer for hole. In addition, an RF coil may be sputtered to provide protective material during ICP resputtering. In another chamber an array of auxiliary magnets positioned along sidewalls of a magnetron sputter reactor on a side towards the wafer from the target.
    Type: Application
    Filed: October 31, 2007
    Publication date: May 15, 2008
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Peijun DING, Rong TAO, Zheng XU, Daniel LUBBEN, Suraj RENGARAJAN, Michael MILLER, Arvind SUNDARRAJAN, Xianmin TANG, John FORSTER, Jianming FU, Roderick MOSELY, Fusen CHEN, Praburam GOPALRAJA
  • Publication number: 20080061285
    Abstract: A metal layer, especially a metal compound, induces strain into a gate channel of a MOS transistor. Compressive strain of over 4 GPa is available from sputter deposited TiN. The amount of strain can be controlled at least up to 11 GPa, for example, by wafer biasing. The compressive strain may induce compressive strain in a PMOS channel when deposited around the channel and induce tensile strain in an NMOS channel when deposited over the channel.
    Type: Application
    Filed: July 21, 2006
    Publication date: March 13, 2008
    Inventors: Reza Arghavani, Jianming Fu
  • Patent number: 7335282
    Abstract: A sputtering process and magnetron especially advantageous for low-pressure plasma sputtering or sustained self-sputtering, in which the magnetron has a reduced area but full target coverage. The magnetron includes an outer pole face surrounding an inner pole face with a gap therebetween. The outer pole of the magnetron of the invention is smaller than that of a circular magnetron similarly extending from the center to the periphery of the target and has a substantially larger total magnetic intensity. Thereby, sputtering at low pressure and high ionization fraction is enabled.
    Type: Grant
    Filed: September 13, 2004
    Date of Patent: February 26, 2008
    Inventors: Jianming Fu, Praburam Gopalraja, Fusen Chen, John Forster
  • Patent number: 7294574
    Abstract: An integrated sputtering method and reactor for copper or aluminum seed layers in which a plasma sputter reactor initially deposits a thin conformal layer onto a substrate including a high-aspect ratio hole subject to the formation of overhangs. After the seed deposition, the same sputter reactor is used to sputter etch the substrate with energetic light ions, especially helium, having an energy sufficiently low that it selectively etches the metallization to the heavier underlying barrier layer, for example, copper over tantalum or aluminum over titanium. An RF inductive coil generates the plasma during the sputtering etching while the target power is turned off. A final copper flash step deposits copper over the bare barrier field region before copper is electrochemically plated to fill the hole. The invention also includes a simultaneous sputter deposition and sputter etch, and an energetic ion processing of the copper seed sidewall.
    Type: Grant
    Filed: August 9, 2004
    Date of Patent: November 13, 2007
    Assignee: Applied Materials, Inc.
    Inventors: Peijun Ding, Fuhong Zhang, Hsien-Lung Yang, Michael A. Miller, Jianming Fu, Jick M. Yu, Zheng Xu, Fusen Chen
  • Patent number: 7294245
    Abstract: A magnetic dipole ring assembly positioned inside a vacuum chamber and around a wafer being sputter deposited with a ferromagnetic material such as NiFe or other magnetic materials so that the material is deposited with a predetermined magnetization direction in the plane of the wafer. The magnetic dipole ring may include 8 or more arc-shaped magnet segments arranged in a circle with the respective magnetization directions precessing by 720° around the ring. The dipole ring is preferably encapsulated in a vacuum-tight stainless steel carrier and placed inside the vacuum chamber. The carrier may be detachably mounted on a cover ring, on the shield, or on the interior of the chamber sidewall. In another embodiment, the magnet is a magnetic disk placed under the wafer. Such auxiliary magnets allow the magnetron sputter deposition of aligned magnetic layers.
    Type: Grant
    Filed: May 28, 2004
    Date of Patent: November 13, 2007
    Assignee: Applied Materials, Inc.
    Inventor: Jianming Fu
  • Publication number: 20070241458
    Abstract: A metal/metal nitride barrier layer for semiconductor device applications. The barrier layer is particularly useful in contact vias where high conductivity of the via is important, and a lower resistivity barrier layer provides improved overall via conductivity.
    Type: Application
    Filed: May 30, 2007
    Publication date: October 18, 2007
    Inventors: Peijun Ding, Zheng Xu, Hong Zhang, Xianmin Tang, Praburam Gopalraja, Suraj Rengarajan, John Forster, Jianming Fu, Tony Chiang, Gongda Yao, Fusen Chen, Barry Chin, Gene Kohara
  • Patent number: 7253109
    Abstract: We have discovered a method of providing a thin, approximately from about 2 ? to about 100 ? thick TaN seed layer, which can be used to induce the formation of alpha tantalum when tantalum is deposited over the TaN seed layer. Further, the TaN seed layer exhibits low resistivity, in the range of 30 ??cm and can be used as a low resistivity barrier layer in the absence of an alpha tantalum layer. In one embodiment of the method, a TaN film is altered on its surface to form the TaN seed layer. In another embodiment of the method, a Ta film is altered on its surface to form the TaN seed layer.
    Type: Grant
    Filed: February 28, 2005
    Date of Patent: August 7, 2007
    Assignee: Applied Materials, Inc.
    Inventors: Peijun Ding, Zheng Xu, Hong Zhang, Xianmin Tang, Praburam Gopalraja, Suraj Rengarajan, John C. Forster, Jianming Fu, Tony Chiang, Gongda Yao, Fusen E. Chen, Barry L. Chin, Gene Y. Kohara