Abstract: The present invention provides a substrate for a semiconductor device and a semiconductor device using the same. The substrate for a semiconductor device comprises a ceramic supporting base plate formed by a polycrystalline aluminum nitride (AlN) sintered body; at least one silicon oxide layer formed on the base plate by a sol-gel method wherein the at least one silicon oxide layer has an average roughness less than the base plate to block polycrystalline orientation of the base plate and has a total thickness in a range of 10˜5000 nm, the silicon oxide layer is only formed from the sol-gel method and is not single crystalline; a first buffer layer comprising aluminum nitride (AlN) on the at least one silicon oxide layer with a thickness of 0.1˜10 ?m; and a gallium nitride layer formed on the first buffer layer and having a single-crystal crystalline structure.

Abstract: The present invention provides a substrate for a semiconductor device and a semiconductor device using the same. The substrate for a semiconductor device comprises a ceramic supporting base plate formed by a polycrystalline aluminum nitride (AlN) sintered body; at least one silicon oxide layer formed on the base plate by a sol-gel method wherein the at least one silicon oxide layer has an average roughness less than the base plate to block polycrystalline orientation of the base plate and has a total thickness in a range of 10˜5000 nm, the silicon oxide layer is only formed from the sol-gel method and are not single crystalline; a first buffer layer comprising aluminum nitride (AlN) on the at least one silicon oxide layer with a thickness of 0.1˜10 ?m; and a gallium nitride layer formed on the first buffer layer and having a single-crystal crystalline structure.

Abstract: A template, stamp or mold is fabricated by using a low-k material. The structure of the low-k material is transformed when it is baked in a novel heating process. Thus, the template is fabricated to obtain a high hardness and a high aspect-ratio with a low dose of electron beam lithography and an optimized baking process. Consequently, the residual; layer at photoresist bottom is reduced and the time for reactive ion etching is saved. In the end, the stability and the integrity is improved. Hence, the present invention is a solution for fabricating a template, stamp or mold with the feature size from sub-micrometer down to nanometer level.

Abstract: The present invention first obtains a nano-metal line by an e-beam lithography and an electroless plating, and imprints the line into a material with low-K to obtain a damascene metal line with low cost and high throughput, as a future solution for a metallization process for a general low-K metal damascene structure through CMP.

Abstract: The present invention relates to a micro-array system and the uses thereof. Particularly, the micro-array system is for a micro amount of biomolecules carrying on a bioreaction in a reaction solution, which comprises a substrate comprising a plurality of micro-wells for receiving the reaction solution; a plurality of micro-beads placing in the reaction solution for the biomolecules attached on surfaces thereon; and a vibrating module for vibrating the substrate, which makes the biomolecules attached on the micro-beads react evenly. Optionally, the micro-array system further comprises a temperature control module for controlling the temperature of the reaction solution. The bioreaction performed in the micro-array system according to the invention has the advantages of having a high sensitivity, being easily post-manipulated, being easily operated, having a high reliability and being reusable.