Abstract: Methods and systems for reducing solar cell degradation are provided. The methods and systems related to frequently applying large reverse bias current-voltage (J-V) sweeps to the cell to reduce the rates of internal degradation of the solar cells. The frequent sweeps serve to detrap charge carriers formed in the cell due to photo-oxidative damage. This detrapping reduces the rate of power conversion efficiency (PCE) degradation throughout the life of the solar cell.

Abstract: A cellular mobile station including a modem processor and memory. The memory includes instructions for the modem processor to perform layer 1 processor operations, layer 2 processor operations, and layer 3 processor operations. The modem processor executes the instructions to perform processor operations for the cellular mobile station to communication data as per a cellular communications protocol. In one example, the mobile station includes different levels of memory to provide different deterministic access times.

Abstract: A method and apparatus for rate matching are disclosed by the invention, wherein the method includes: determining an initial value according to the total amount of data in the data stream and a predetermined initial offset value; performing an accumulation processing and an even distribution processing on said initial value and the amount of the data needing rate matching; determining the data needing rate matching from the data stream according to the processing result. With the solution proposed by the invention, a rate matching method using even distribution principle and accumulation principle can be determined. The method is simple, clear and accurate, and can be understood easily.

Abstract: The invention provides a method for storing hybrid automatic repeat request (HARQ) data, the method including: when receiving new data of a coded block, a HARQ processor writing the new data into a high rate buffer memory (Cache) and a channel decoder; the Cache writing the new data into a data memory of the Cache or an external memory; and when receiving retransmitted data of the coded block, the HARQ processor obtaining a previous data corresponding to the retransmitted data from the data memory of the Cache or the external memory through the Cache, combining the retransmitted data and the previous data, and writing the combined data to the Cache and the channel decoder; the Cache writing the combined data into the data memory of the Cache or the external memory. The invention also provides a HARQ combiner.

Abstract: The invention provides a method for hierarchy management for a HARQ memory, wherein, the HARQ memory includes an on-chip memory including one or more storage blocks, each of which corresponds to a using status bit for indicating whether the storage block is overlayable. The method includes the following steps of: when receiving new data of a coded block, searching the on-chip memory for any overlayable storage block, and if there exists an overlayable storage block, storing the new data into the storage block and setting the using status bit corresponding to the storage block to be un-overlayable; if there is no overlayable storage block, storing the new data into an off-chip memory; and when the new data are checked and pass the check, setting the using status bit corresponding to the storage block in which the new data are stored to be overlayable. The invention also provides a corresponding system.

Abstract: The invention provides a method for storing hybrid automatic repeat request (HARQ) data, the method including: when receiving new data of a coded block, a HARQ processor writing the new data into a high rate buffer memory (Cache) and a channel decoder; the Cache writing the new data into a data memory of the Cache or an external memory; and when receiving retransmitted data of the coded block, the HARQ processor obtaining a previous data corresponding to the retransmitted data from the data memory of the Cache or the external memory through the Cache, combining the retransmitted data and the previous data, and writing the combined data to the Cache and the channel decoder; the Cache writing the combined data into the data memory of the Cache or the external memory. The invention also provides a HARQ combiner.

Abstract: The invention provides a method for hierarchy management for a HARQ memory, wherein, the HARQ memory includes an on-chip memory including one or more storage blocks, each of which corresponds to a using status bit for indicating whether the storage block is overlayable. The method includes the following steps of: when receiving new data of a coded block, searching the on-chip memory for any overlayable storage block, and if there exists an overlayable storage block, storing the new data into the storage block and setting the using status bit corresponding to the storage block to be un-overlayable; if there is no overlayable storage block, storing the new data into an off-chip memory; and when the new data are checked and pass the check, setting the using status bit corresponding to the storage block in which the new data are stored to be overlayable. The invention also provides a corresponding system.

Abstract: A cellular mobile station including a modem processor and memory. The memory includes instructions for the modem processor to perform layer 1 processor operations, layer 2 processor operations, and layer 3 processor operations. The modem processor executes the instructions to perform processor operations for the cellular mobile station to communication data as per a cellular communications protocol.

Abstract: A cellular mobile station including a modem processor and memory. The memory includes instructions for the modem processor to perform layer 1 processor operations, layer 2 processor operations, and layer 3 processor operations. The modem processor executes the instructions to perform processor operations for the cellular mobile station to communication data as per a cellular communications protocol. In one example, the mobile station includes different levels of memory to provide different deterministic access times.

Abstract: A method and apparatus for rate matching are disclosed by the invention, wherein the method includes: determining an initial value according to the total amount of data in the data stream and a predetermined initial offset value; performing an accumulation processing and an even distribution processing on said initial value and the amount of the data needing rate matching; determining the data needing rate matching from the data stream according to the processing result. With the solution proposed by the invention, a rate matching method using even distribution principle and accumulation principle can be determined. The method is simple, clear and accurate, and can be understood easily.

Abstract: The invention concerns a method (500) for employing adaptive event codes. The method includes the steps of generating (512) at least one adaptive event code in which the adaptive event code corresponds to a preexisting event code, storing (514) the adaptive event code in at least one table (154, 156), running (516) the table in which the adaptive event codes are at least initially disabled and enabling (522) the adaptive event code in response to a system event in which the preexisting event code that corresponds to the enabled adaptive event code is executed (526). The method can further include the step of ignoring (518) the adaptive event codes during the running step when the adaptive event codes are disabled.

Abstract: A cellular mobile station including a modem processor and memory. The memory includes instructions for the modem processor to perform layer 1 processor operations, layer 2 processor operations, and layer 3 processor operations. The modem processor executes the instructions to perform processor operations for the cellular mobile station to communication data as per a cellular communications protocol.

Abstract: A cellular mobile station including a modem processor and memory. The memory includes instructions for the modem processor to perform layer 1 processor operations, layer 2 processor operations, and layer 3 processor operations. The modem processor executes the instructions to perform processor operations for the cellular mobile station to communication data as per a cellular communications protocol. In one example, the mobile station includes different levels of memory to provide different deterministic access times.

Abstract: A method and apparatus for entering a low power mode is provided. In one embodiment, data processing system (10) has power control circuitry (52) which may be used to control power usage in data processing system (10). Power mode select circuitry (84) may be used to select a power mode. Depending upon the power mode selected, power control circuitry (52) may use a cascaded approach to selecting which portions of data processing system (10) will be powered down, and thus how deeply data processing system (10) will be powered down.

Abstract: The invention concerns a method (300) and system (100) for exchanging data in a multi-core architecture having at least one shared memory (114). The method can include the steps of requesting (312) data in a first format from a predetermined range of addresses in the shared memory in which the data is shared between different processors, storing (316) the requested data in a cache (118) to be retrieved by a format converter (120) and identifying (320) to the format converter a data type for the data. The method can also include the step of, with the format converter, translating (322) based on predetermined rules the data to a second format that is native to a processor (110) that will process the data.

Abstract: The invention concerns a method (500) for employing adaptive event codes. The method includes the steps of generating (512) at least one adaptive event code in which the adaptive event code corresponds to a preexisting event code, storing (514) the adaptive event code in at least one table (154, 156), running (516) the table in which the adaptive event codes are at least initially disabled and enabling (522) the adaptive event code in response to a system event in which the preexisting event code that corresponds to the enabled adaptive event code is executed (526). The method can further include the step of ignoring (518) the adaptive event codes during the running step when the adaptive event codes are disabled.

Abstract: A method and apparatus for entering a low power mode is provided. In one embodiment, data processing system (10) has power control circuitry (52) which may be used to control power usage in data processing system (10). Power mode select circuitry (84) may be used to select a power mode. Depending upon the power mode selected, power control circuitry (52) may use a cascaded approach to selecting which portions of data processing system (10) will be powered down, and thus how deeply data processing system (10) will be powered down.

Abstract: A cellular mobile station including a modem processor and memory. The memory includes instructions for the modem processor to perform layer 1 processor operations, layer 2 processor operations, and layer 3 processor operations. The modem processor executes the instructions to perform processor operations for the cellular mobile station to communication data as per a cellular communications protocol.

Abstract: A variable length decoder (200) detects the class of a codeword in a bit stream (332). If the codeword is first class, a first set of encoding rules are used to generate a pointer “C A B” into a table to retrieve table content (250), where the values of “C”, “A”, and “B” are determined from the codeword. If the codeword is second class, a second set of encoding rules are used to generate a pointer “0 (C+X) Z” into a table to retrieve table contents (252), where the values of “C” and “Z” are determined from the codeword and the value of “X” is a predetermined value. The code length of each codeword is calculated while the pointer is being generated, and thus the code length does not have to be stored in memory (204).